Oxide Semiconductor Device Reducing Off-State Current
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Solution Overview
Problem
Conventional semiconductor devices experience high off-state current, leading to increased power consumption and potential malfunctions due to changes in voltage values in logic circuits.
Innovation Solution
A semiconductor device utilizing an oxide semiconductor with holes having a larger effective mass than electrons, specifically incorporating materials like indium, gallium, tin, titanium, zirconium, hafnium, zinc, and germanium, to achieve a significantly low off-state current density of 100 zA/μm or less, with a band gap of 2 eV to 4 eV and carrier density between 10^-10/cm^3 and 10^17/cm^3, and featuring a c-axis-aligned crystal structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional semiconductor materials are used, then device functionality is achieved, but off-state current is high leading to increased power consumption
Solution Approach 1:
The patent changes the fundamental material parameter (band gap) from conventional semiconductors (Si, GaAs) to wide-band-gap semiconductors (GaN, InN, InGaZnO3) with band gaps of 3.4 eV or wider. This parameter change directly reduces off-state current by several orders of magnitude, achieving power consumption reduction while maintaining device functionality
Solution Approach 2:
The patent employs composite material structures including heterojunctions (e.g., GaN/InN, InGaZnO3 interfaces) and multi-layer configurations. These composite structures leverage the large effective mass of holes at specific material interfaces to create potential barriers that suppress off-state current while maintaining on-state performance
2Productivity
If transistor size is reduced for miniaturization, then integration density increases, but off-state current becomes more difficult to control
Solution Approach 1:
By transitioning to wide-band-gap materials with inherently lower carrier concentrations and higher breakdown fields, the patent enables miniaturization while maintaining off-state current control. The material parameter changes allow smaller device dimensions without proportionally increasing leakage
Solution Approach 2:
The patent implements localized high-quality interface regions with optimized crystal orientation (c-axis alignment) and reduced defect densities at critical interfaces. This local quality enhancement ensures stable off-state current control even as overall device dimensions are reduced for higher integration
3Reliability
If oxide semiconductor materials with large hole effective mass are used, then off-state current is significantly reduced, but material selection and fabrication complexity increases
Solution Approach 1:
The patent focuses on achieving off-state current reduction through controlled changes in hole effective mass parameter by selecting specific oxide semiconductor compositions (InGaZnO3, In2O3-based) with proven large hole effective mass (10-100 times electron mass). This targeted parameter approach simplifies material selection compared to exploring all possible semiconductors
Solution Approach 2:
The patent uses c-axis-aligned crystalline structures as an intermediary mechanism that mediates between material composition and electrical properties. By controlling crystal orientation rather than just chemical composition, the patent simplifies the fabrication process while achieving the desired large hole effective mass and low off-state current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a semiconductor device with a significantly low off-state current, reducing power consumption and enhancing the reliability of electronic devices by minimizing voltage fluctuations.
Implementation Method 1
The use of a wide-gap semiconductor in which holes have a large effective mass makes it possible to obtain a semiconductor device with significantly low off-state current
Implementation Method 2
featuring a c-axis-aligned crystal structure
Data Source
AI summary
A semiconductor device with significantly low off-state current is provided. An oxide semiconductor material in which holes have a larger effective mass than electrons is used. A transistor is provided which includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer including a hole whose effective mass is 5 or more times, preferably 10 or more times, further preferably 20 or more times that of an electron in the oxide semiconductor layer, a source electrode layer in contact with the oxide semiconductor layer, and a drain electrode layer in contact with the oxide semiconductor layer.