Oxide Semiconductor Device With Segmented Gate Electrodes
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Solution Overview
Problem
Current semiconductor devices, particularly power devices, face limitations in achieving high current flow, tolerance to high driving voltages, and stable operation at high temperatures due to the narrow band gap of silicon, which restricts their performance and reliability.
Innovation Solution
A semiconductor device structure incorporating a semiconductor layer with a wider band gap material, such as an oxide semiconductor, and a unique gate electrode configuration that includes multiple gate electrodes with specific overlapping and non-overlapping regions to enhance current flow, voltage tolerance, and temperature stability, while allowing for control of threshold voltage and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If silicon-based semiconductor materials are used in power devices, then manufacturing process is well-established and device structure is simple, but the operation range is limited at high temperature due to narrow band gap
Solution Approach 1:
The patent changes the fundamental material parameter (band gap) by transitioning from silicon-based semiconductor to oxide semiconductor. This parameter change enables the device to operate at higher temperatures while maintaining stability, as oxide semiconductors have wider band gaps that prevent thermal excitation of carriers at elevated temperatures.
Solution Approach 2:
The patent employs a composite structure combining oxide semiconductor layer with specific gate insulating layers and electrode structures. This composite approach leverages the advantageous properties of each material: oxide semiconductor for high temperature operation, gate insulating materials for electrical isolation and threshold control, creating a device that maintains reliability at high temperatures.
2Power
If single gate electrode configuration is used, then device structure is simple, but current flow and voltage tolerance are limited
Solution Approach 1:
The patent divides the gate control function into multiple separate gate electrodes (first gate electrode and second gate electrode) positioned at different locations relative to the source and drain electrodes. This segmentation allows independent control of different regions of the channel, enabling enhanced current flow through optimized electric field distribution and improved voltage tolerance through distributed control.
Solution Approach 2:
The patent extends the gate control from a single-plane configuration to a multi-plane or multi-layer configuration where gate electrodes are positioned at different heights or lateral positions. This dimensional expansion allows for more complex electric field shaping, improving both current flow characteristics and voltage tolerance without simply increasing the number of materials.
3Use of energy by moving object
If threshold voltage is not controlled, then device structure is simpler, but power consumption increases
Solution Approach 1:
The patent segments the gate control function into multiple gate electrodes that can be independently biased. This segmentation enables precise control of the threshold voltage by applying different potentials to different gate regions, allowing the device to maintain appropriate threshold characteristics while reducing leakage current and power consumption in the off-state.
Solution Approach 2:
The multiple gate electrodes serve multiple functions simultaneously: they control threshold voltage, modulate channel conductivity, and provide independent control for reducing power consumption. This multi-functionality allows a single gate structure to address both performance optimization and energy efficiency without requiring separate control mechanisms.
Data Source
AI summary
To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate electrode and a second gate electrode with the semiconductor layer therebetween, a first gate insulating layer between the semiconductor layer and the first gate electrode, and a second gate insulating layer between the semiconductor layer and the second gate electrode. The first gate electrode overlaps with part of the first electrode, the semiconductor layer, and part of the second electrode. The second gate electrode overlaps with the semiconductor layer and part of the first electrode, and does not overlap with the second electrode.