Oxide Semiconductor Film Side Surface Corrugation
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Solution Overview
Problem
In semiconductor devices using oxide semiconductor films, the generation of parasitic channels on the side surfaces due to electric field stress leads to increased current consumption and voltage retention issues, primarily because the side surfaces are prone to contamination and activation during the manufacturing process.
Innovation Solution
The formation of high resistance regions on the side surfaces of the oxide semiconductor film that overlap with the gate electrode, featuring corrugated, waved, or jagged surfaces, or alternating projected and depressed portions, to increase the length of the side surface overlap with the gate electrode, thereby suppressing parasitic channel generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the oxide semiconductor film is formed using photolithography and etching processes, then the transistor structure is manufactured, but the side surface of the oxide semiconductor film is damaged and contaminated, leading to easy activation and parasitic channel formation
Solution Approach 1:
A protective film is formed over the oxide semiconductor film before the etching process. This protective film prevents the etching atmosphere from directly contacting and damaging the side surface of the oxide semiconductor film, thereby preventing contamination and easy activation that would lead to parasitic channel formation.
Solution Approach 2:
The protective film acts as an intermediary layer between the etching atmosphere and the oxide semiconductor film side surface. It shields the vulnerable side surface from direct exposure to the etching plasma, preventing damage and impurity contamination while allowing the etching process to proceed for other structures.
2Measurement precision
If negative voltage is applied to the gate electrode during GBT stress test, then the transistor characteristics are tested, but stress is generated in the end region of the oxide semiconductor film, making it n-type and forming parasitic channels
Solution Approach 1:
The protective film is formed in advance before the GBT stress test. During the stress test with negative gate voltage, this pre-formed protective film shields the side surface of the oxide semiconductor film from electric field stress, preventing the stress-induced n-type activation and parasitic channel generation that would otherwise occur in the end regions.
Solution Approach 2:
The protective film serves as a mediator that isolates the oxide semiconductor film side surface from the harmful electric field stress during GBT testing. It allows the necessary voltage application for characterization while preventing the stress from concentrating on and damaging the vulnerable end regions of the semiconductor film.
3Device complexity
If the entire end region of the oxide semiconductor film overlaps with the gate electrode, then the transistor structure is simplified, but stress concentration occurs in the end region, easily creating n-type conductivity and leakage paths
Solution Approach 1:
The protective film is formed over the oxide semiconductor film before device assembly, creating a preliminary protective barrier. This barrier remains in place during operation, continuously protecting the side surface and end regions from stress concentration and contamination, thereby preventing leakage path formation even when the structure maintains full overlap for simplicity.
Data Source
AI summary
The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.