Oxide Semiconductor Stack for Stable Electrical Characteristics
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Solution Overview
Problem
Oxygen vacancies and impurity entry in oxide semiconductor layers of transistors lead to increased off-state current and variation in threshold voltage, reducing the reliability of semiconductor devices.
Innovation Solution
A semiconductor device with a stacked oxide semiconductor structure, where a high-indium second oxide semiconductor layer with a crystalline structure is sandwiched between amorphous first and third oxide semiconductor layers, along with excess oxygen insulating layers to reduce impurity impact and stabilize carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-layer oxide semiconductor structure is used, then the device structure is simple, but oxygen vacancies and impurity entry increase off-state current and threshold voltage variation
Solution Approach 1:
The oxide semiconductor layer is divided into three distinct layers: a first oxide semiconductor layer, a second oxide semiconductor layer with higher indium proportion, and a third oxide semiconductor layer. This segmentation allows each layer to perform specific functions - the second layer serves as the primary carrier path with high mobility while the first and third layers act as protective barriers, thereby improving reliability without requiring complex external structures
Solution Approach 2:
The second oxide semiconductor layer with high carrier mobility is nested between the first and third oxide semiconductor layers. This nested structure protects the critical high-mobility layer from oxygen vacancies and impurity entry, allowing the device to maintain simple overall structure while achieving improved electrical characteristics stability through the protective sandwich configuration
2Area of stationary object
If the oxide semiconductor layer is positioned close to oxide insulating layers, then device area is reduced, but impurity entry from insulating layers increases off-state current
Solution Approach 1:
The first and third oxide semiconductor layers serve as intermediary protective barriers between the second oxide semiconductor layer (carrier path) and the oxide insulating layers. These intermediary layers prevent direct contact and impurity entry from the insulating layers into the high-mobility second layer, allowing the device to maintain compact area while protecting against harmful impurity migration
Solution Approach 2:
Different regions of the oxide semiconductor stack are assigned different functional qualities: the first and third layers provide protective quality with lower indium proportion to resist impurity entry, while the second layer provides high carrier mobility quality with higher indium proportion. This local quality differentiation allows the structure to simultaneously achieve compact area and resistance to impurity effects
3Speed
If indium proportion is increased in oxide semiconductor layer, then carrier mobility is improved, but oxygen vacancy generation increases threshold voltage variation
Solution Approach 1:
The indium proportion is locally optimized in different layers: the second oxide semiconductor layer has higher indium proportion (0.2-0.8) to achieve high carrier mobility, while the first and third layers have lower indium proportion (0.1-0.6) to provide stability and resist oxygen vacancy formation. This local quality optimization allows the device to achieve high speed performance while maintaining compositional stability through the protective outer layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the impact of impurities and oxygen vacancies, leading to stable electrical characteristics and enhanced reliability of semiconductor devices by creating a well-shaped structure that minimizes carrier flow through the insulating layers and prevents impurity entry.
Implementation Method 1
the second oxide semiconductor layer has high carrier mobility and serves as a carrier path
Implementation Method 2
the first and the third oxide semiconductor layers can also be called barrier layers which prevent Group 14 elements such as silicon from entering the second oxide semiconductor layer
Implementation Method 3
a well-shaped structure (also referred to as a well structure) is formed in which the bottom of the conduction band of the second oxide semiconductor layer is at the deepest energy level
Data Source
AI summary
To provide a highly reliable semiconductor device exhibiting stable electrical characteristics. To fabricate a highly reliable semiconductor device. Included are an oxide semiconductor stack in which a first to a third oxide semiconductor layers are stacked, a source and a drain electrode layers contacting the oxide semiconductor stack, a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating layer provided therebetween, and a first and a second oxide insulating layers between which the oxide semiconductor stack is sandwiched. The first to the third oxide semiconductor layers each contain indium, gallium, and zinc. The proportion of indium in the second oxide semiconductor layer is higher than that in each of the first and the third oxide semiconductor layers. The first and the third oxide semiconductor layers are each an amorphous semiconductor film. The second oxide semiconductor layer is a crystalline semiconductor film.