Oxide Semiconductor Switch ADC Sampling Rate Adaptability
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Solution Overview
Problem
Analog/digital converter circuits (ADCs) have limited adaptable sampling rates, restricting their usability across various applications, and existing solutions do not effectively extend this range while maintaining low power consumption.
Innovation Solution
A semiconductor device incorporating a switch with an oxide semiconductor in the channel formation region, combined with sample-and-hold circuits and converter circuits, allows for extended sampling rates by efficiently converting analog signals to digital signals through a pipeline type ADC structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional ADC structures are used, then the circuit can operate at a fixed sampling rate, but the adaptable sampling rate range is limited
Solution Approach 1:
The patent applies dynamics by making the switching timing flexible rather than fixed. The switch timing is dynamically adjusted based on the desired sampling rate, allowing the same circuit structure to adapt to different sampling rates without requiring multiple dedicated circuits for each rate.
Solution Approach 2:
The patent changes the timing parameter of the switch operation to achieve different sampling rates. By varying when the switch closes and opens during the analog-to-digital conversion process, the circuit can operate at multiple sampling rates while maintaining the same physical structure.
2Adaptability or versatility
If multiple ADC circuits are provided for different sampling rates, then the adaptable sampling rate range extends, but the device complexity and power consumption increase
Solution Approach 1:
The patent implements universality by designing a single ADC circuit that can perform multiple sampling rate functions. The same analog-to-digital converter handles different sampling rates by adjusting switch timing, eliminating the need for multiple dedicated ADC circuits and thereby reducing overall power consumption.
Solution Approach 2:
The patent merges the functionality of multiple potential ADC circuits into one unified circuit. By combining the sampling, holding, and conversion functions into a single integrated structure with controllable switch timing, the system achieves multi-rate capability without the power overhead of parallel circuits.
3Ease of operation
If the switch timing is fixed in the ADC circuit, then the circuit operation is simple, but the sampling rate cannot be adjusted
Solution Approach 1:
The patent applies preliminary action by pre-configuring the switch timing control mechanism that can be adjusted before operation. The circuit includes control logic that sets the switch timing parameters in advance based on the desired sampling rate, maintaining operational simplicity while enabling adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device enhances the adaptable sampling rate range during analog/digital conversion, improving the device's usability across different applications while maintaining low power consumption.
Implementation Method 1
The switch includes an oxide semiconductor in a channel formation region
Data Source
AI summary
A semiconductor device that can extend the range of adaptable sampling rate when performing analog/digital conversion is provided. The semiconductor device includes a plurality of sample-and-hold circuits storing an analog signal and a plurality of converter circuits having a function of converting the analog signal stored in the sample-and-hold circuit into a digital signal. The sample-and-hold circuit includes a switch and a capacitor that is supplied with an analog signal through the switch. The switch includes an oxide semiconductor in a channel formation region.