Oxide Semiconductor Device Tapered Insulator Short Channel
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Solution Overview
Problem
Semiconductor devices with channels made of amorphous silicon have low mobility and high off-current, while those with low-temperature polysilicon or single crystalline silicon channels have complex structures and high manufacturing costs, limiting their use in display devices due to substrate size and mobility constraints.
Innovation Solution
A semiconductor device with a channel formed of an oxide semiconductor, featuring a unique structure with a tapered insulating layer and electrode design that allows for a shorter channel length and reduced in-plane variance, enabling higher on-current and improved performance on large glass substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a channel is formed of amorphous silicon, then the structure is simpler and the manufacturing process is easier (process temperature ≤400°C), but the mobility is low and off-current is high
Solution Approach 1:
The invention changes the material parameter from amorphous silicon to oxide semiconductor, which maintains the low-temperature processing advantage (≤400°C) while fundamentally improving the off-current characteristic through the material's inherent properties
Solution Approach 2:
The invention uses a composite structure combining oxide semiconductor channel with specific insulating layers (gate insulating layer, interlayer insulating layers) to achieve both low-temperature processing and excellent off-current control
2Reliability
If a channel is formed of low-temperature polysilicon or single crystalline silicon, then the mobility is higher and it can be used in driving circuits, but the structure becomes complicated and manufacturing cost increases
Solution Approach 1:
The invention changes the material from polysilicon/single crystalline silicon to oxide semiconductor, maintaining high mobility while simplifying the manufacturing process and structure through low-temperature deposition techniques
Solution Approach 2:
The invention uses a simpler oxide semiconductor structure that can be manufactured more easily and cheaply compared to complex polysilicon or single crystalline silicon structures, achieving comparable or better performance
3Ease of manufacture
If a channel is formed of amorphous silicon, low-temperature polysilicon or single crystalline silicon, then it can be manufactured with existing processes, but the off-current is high making it difficult to maintain applied voltage
Solution Approach 1:
The invention changes the semiconductor material to oxide semiconductor, which inherently provides extremely low off-current due to its wide bandgap, enabling excellent voltage holding capability while maintaining compatibility with low-temperature manufacturing processes
4Reliability
If the channel length is shortened to increase on-current in oxide semiconductor devices, then the mobility limitation is compensated, but photolithography precision becomes insufficient to achieve the required short dimensions
Solution Approach 1:
The invention replaces the photolithography-based patterning method with a self-aligned formation method using conductive plugs and openings, eliminating the diffraction limit and achieving sub-micrometer channel length precision without requiring high-precision photolithography
Data Source
AI summary
A semiconductor device includes a first electrode, a first insulating layer on the first electrode, a second electrode on the first insulating layer, a second insulating layer on the second electrode, a first opening in the first insulating layer, the second electrode and the second insulating layer, the first opening reaching the first electrode, a first oxide semiconductor layer in the first opening, the first oxide semiconductor layer being connected with the first electrode and the second electrode, a first gate electrode facing the first oxide semiconductor layer, and a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode.