Oxide Semiconductor TFT Gate Structure for Leakage Control
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Solution Overview
Problem
Oxide semiconductor TFTs with a top gate structure experience increased OFF-leak current, leading to unstable characteristics, making them unsuitable for use in display devices due to resistance lowering issues in the oxide semiconductor layer.
Innovation Solution
An active matrix substrate design incorporating an oxide semiconductor TFT with a multilayer gate electrode structure, where a metal layer made of Cu, Mo, or Cr is used in conjunction with a gate insulating layer, and the metal is intentionally admixed into the oxide semiconductor layer to increase resistance and reduce OFF-leak current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a top gate structure is used in oxide semiconductor TFTs, then the TFT can operate more rapidly and the manufacturing process is simpler, but the OFF-leak current increases and characteristics become unstable
Solution Approach 1:
The patent applies local quality by creating a dual-gate structure where a bottom gate electrode is added beneath the oxide semiconductor layer while maintaining the top gate electrode. This local structural modification allows independent control of electric fields at different locations, enabling effective suppression of OFF-leak current through the bottom gate while preserving the rapid operation characteristics provided by the top gate structure.
Solution Approach 2:
The patent employs composite materials by combining the oxide semiconductor active layer with a dual-gate electrode structure (top gate and bottom gate). This composite structure integrates the advantages of both top-gate rapid operation and bottom-gate leak suppression, creating a TFT that achieves both high speed and stable characteristics.
2Reliability
If the oxide semiconductor layer resistance is lowered to improve conductivity, then the TFT can operate more efficiently, but the OFF-leak current increases
Solution Approach 1:
The patent applies dynamics by using the bottom gate electrode to dynamically control the resistance state of the oxide semiconductor layer. During OFF state, the bottom gate applies a voltage that maintains higher resistance to suppress leak current. During ON state, the coordinated action of top and bottom gates reduces resistance to enable efficient current flow, thus dynamically adjusting resistance based on operational state.
Solution Approach 2:
The patent utilizes parameter changes by varying the voltage applied to the bottom gate electrode to control the resistance of the oxide semiconductor layer. By changing the electrical parameters (voltage levels) at the bottom gate, the resistance can be optimized for different operational states, achieving low OFF-leak current while maintaining good ON-state conductivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces OFF-leak current and stabilizes the TFT characteristics, enabling the use of oxide semiconductor TFTs in display devices by suppressing resistance lowering in the oxide semiconductor layer.
Implementation Method 1
the metal is intentionally admixed into the oxide semiconductor layer to increase resistance and reduce OFF-leak current
Data Source
AI summary
An oxide semiconductor TFT (201) of an active matrix substrate includes an oxide semiconductor layer (107), an upper gate electrode (112) disposed on a part of the oxide semiconductor layer via a gate insulating layer, and a source electrode (113) and a drain electrode (114). As viewed from a normal direction of the substrate, the oxide semiconductor layer (107) includes a first portion (p1) that overlaps the upper gate electrode, and a second portion (p2) that is located between the first portion and the source contact region or drain contact region, such that the gate insulating layer does not cover the second portion. The upper gate electrode (112) has a multilayer structure including an alloy layer (112L) that is in contact with the gate insulating layer and a metal layer (112U) that is disposed on the alloy layer. The metal layer is made of a first metallic element M; the alloy layer is made of an alloy containing the first metallic element M; and the first metallic element M is Cu, Mo, or Cr.