Oxide Semiconductor TFT Gate Overlap Design
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Solution Overview
Problem
Conventional semiconductor devices face challenges in increasing pixel definition while maintaining high reliability, particularly due to misalignment issues that can lead to short-circuiting between the pixel electrode and the gate electrode.
Innovation Solution
A semiconductor device design featuring a thin film transistor with a gate electrode, gate insulating layer, and an oxide semiconductor layer, where the oxide semiconductor layer overlaps the gate electrode and has a channel, source, and drain contact regions, with a transparent electrode in contact with the drain contact region through a contact hole, ensuring the gate electrode is covered and preventing misalignment-induced short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the pixel electrode is arranged in direct contact with the oxide semiconductor layer to eliminate the drain electrode, then the pixel aperture ratio is improved, but the reliability deteriorates due to misalignment causing short-circuits between pixel electrode and gate electrode
Solution Approach 1:
The patent introduces an insulating layer as an intermediary between the pixel electrode and the oxide semiconductor layer. This insulating layer includes a contact hole that mediates the electrical connection, preventing direct contact that could cause short-circuits while maintaining the desired electrical connectivity through precise hole formation
Solution Approach 2:
The patent transitions from a planar direct-contact configuration to a three-dimensional structure with a contact hole penetrating the insulating layer. This dimensional change allows the pixel electrode to connect to the oxide semiconductor layer through the insulating layer via the contact hole, preventing lateral short-circuits while maintaining vertical electrical connection
2Productivity
If the definition increases and pixel area decreases, then the productivity is improved, but the manufacturing precision deteriorates due to decreased interval between source bus line and drain electrode
Solution Approach 1:
The patent extracts the drain electrode function from the metal film patterning process by using the pixel electrode itself as the drain electrode. This eliminates the need for separate drain electrode formation and reduces the number of patterning steps, thereby improving manufacturing precision despite higher definition requirements
Solution Approach 2:
The patent merges the pixel electrode and drain electrode into a single structure. The pixel electrode serves dual functions as both the pixel electrode and the drain electrode, eliminating the need for separate drain electrode formation and reducing processing complexity for high-definition displays
Data Source
AI summary
A semiconductor device (1001) includes: a thin film transistor (101) including an oxide semiconductor layer (16) including a channel region, and a source contact region and a drain contact region arranged on opposite sides of the channel region; an insulating layer arranged so as to cover the oxide semiconductor layer (16), the insulating layer having a contact hole (CH) through which the drain contact region is exposed; and a transparent electrode (24) to be in contact with the drain contact region in the contact hole (CH), wherein: as seen from a direction normal to the substrate, at least a part R of the drain contact region overlaps a gate electrode (12); and on an arbitrary cross section that extends in a channel width direction across the at least part (R) of the drain contact region, a width of the oxide semiconductor layer (16) is greater than a width of the gate electrode (12), and the gate electrode (12) is covered by the oxide semiconductor layer (16) with the gate insulating layer therebetween.


