Oxide Semiconductor Thin Film Transistor Insulating Layer Reliability

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Solution Overview

Problem

Current thin film transistors, particularly those using oxide semiconductors, face challenges in reliability due to structural and processing conditions during dry etching or wet etching, which affect their performance and integration in large-size, high-resolution displays.

Innovation Solution

The implementation of an oxide semiconductor thin film transistor with an insulating layer having a step-shaped outer portion, formed using a high-molecule compound including carbon, and a method involving the patterning of gate and insulating layers to enhance reliability, where the insulating layer partially contacts the gate insulating layer and electrodes, improving the transistor's structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If oxide semiconductor thin film transistor is formed using conventional insulating layer structure, then manufacturing process is simple, but reliability is poor due to structural and processing conditions in dry etching or wet etching

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidinsulating layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulating layer is divided into multiple distinct layers: a first insulating layer formed on the gate electrode, a second insulating layer formed on the first insulating layer, and an organic insulating layer formed on the second insulating layer. This segmentation allows each layer to perform specific functions and improves overall device reliability while managing complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a composite insulating layer structure combining inorganic materials (first and second insulating layers) with organic materials (organic insulating layer). This composite approach leverages the advantages of different material types to enhance transistor reliability, particularly in resisting processing conditions during dry and wet etching, while maintaining a manageable structural complexity.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If oxide semiconductor thin film transistor uses simple insulating layer configuration, then manufacturing is easier, but electrode formation uniformity is poor

Engineering Contradiction:
Improveelectrode formation uniformityVSAvoidinsulating layer formation
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The insulating layer is segmented into three distinct layers with different materials and functions. The first insulating layer provides base insulation, the second insulating layer enhances structural stability, and the organic insulating layer improves surface uniformity for electrode formation. This segmentation achieves precise electrode formation uniformity while managing manufacturing complexity through systematic layer differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each insulating layer is designed with specific local properties: the first insulating layer provides fundamental insulation, the second insulating layer offers enhanced structural support, and the organic insulating layer delivers superior surface uniformity where electrodes will be formed. This local quality differentiation optimizes electrode formation uniformity in critical areas while maintaining ease of manufacture through standardized layer formation processes.

Inventive Principle:
Principle #3Local quality

3Productivity

If conventional thin film transistor structure is used, then device complexity is low, but wire resistance and parasitic capacitance are high reducing driving performance

Engineering Contradiction:
Improvedriving performanceVSAvoidtransistor structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The transistor structure employs composite materials including oxide semiconductor for the active layer and multi-layer insulating structures combining inorganic and organic materials. This composite approach reduces wire resistance and parasitic capacitance by optimizing electrical properties throughout the device structure, improving driving performance while managing device complexity through functional material selection.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent introduces additional dimensional complexity through the multi-layer insulating structure stacked vertically above the gate electrode. This vertical dimensionality allows for optimized electrical characteristics by controlling field distribution and reducing parasitic effects, thereby improving driving performance while the layered architecture manages structural complexity through systematic organization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8853699B2Thin film transistor and method of forming the same
Publication Date: 2014.10.07 SAMSUNG DISPLAY CO LTD
  • US8853699B2 patent drawing
  • US8853699B2 patent drawing
  • US8853699B2 patent drawing

AI summary

Disclosed are a thin film transistor and a method of forming the thin film transistor, wherein the thin film transistor includes a gate electrode, an oxide semiconductor pattern, a first gate insulating layer pattern interposed between the gate electrode and the oxide semiconductor pattern, wherein the first gate insulating layer pattern has an island shape or has two portions of different thicknesses from each other, a source electrode and a drain electrode electrically connected to the oxide semiconductor pattern, wherein the source electrode and the drain electrode are separated from each other, and a first insulating layer pattern placed between the source electrode and drain electrode and the oxide semiconductor pattern, wherein the first insulating layer pattern partially contacts the source electrode and drain electrode and the first gate insulating layer pattern, and wherein the first insulating layer is enclosed by an outer portion.