Oxide Semiconductor Thin Film Transistor Parasitic Capacitance Reduction
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Solution Overview
Problem
In semiconductor devices, parasitic capacitance between wirings can lead to signal distortion, increased power consumption, and reduced operation speed, particularly in thin film transistors used in driver circuits and pixel portions of display devices, where high-speed operation and low parasitic capacitance are crucial.
Innovation Solution
A semiconductor device structure is developed with a stacked layer comprising a metal thin film and an oxide semiconductor layer, where an oxide insulating layer covers the peripheral and side surfaces of the oxide semiconductor layer, reducing parasitic capacitance and enhancing signal transmission speed. This structure includes a first oxide semiconductor layer with lower resistivity and a second oxide semiconductor layer with an oxygen-deficient region, optimized through heat treatment and oxidation processes to improve electrical field mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wirings are placed close to each other to increase integration density, then device complexity is reduced and integration density is improved, but parasitic capacitance between wirings increases causing signal distortion and reduced operation speed
Solution Approach 1:
An oxide insulating layer is introduced as an intermediary substance between adjacent wirings to reduce parasitic capacitance. This intermediate insulating layer acts as a mediator that electrically isolates the wirings while allowing them to remain in close proximity, thus maintaining high integration density without excessive parasitic capacitance effects
Solution Approach 2:
The dielectric constant of the insulating material between wirings is changed by using oxide insulating materials with low dielectric constants. This parameter change reduces the parasitic capacitance value while maintaining the physical proximity of wirings for high integration density
2Speed
If channel length of thin film transistor is reduced to increase operation speed, then operation speed is improved, but switching characteristic and on-off ratio are lowered
Solution Approach 1:
The physical dimensions of the channel are optimized by using thin oxide semiconductor layers (3 nm to 30 nm thick) to reduce channel length and increase operation speed, while the material composition and stacking structure are adjusted to maintain adequate switching characteristics and on-off ratio
3Speed
If oxide semiconductor layer is made thinner to reduce parasitic capacitance and increase operation speed, then parasitic capacitance is reduced and operation speed is improved, but manufacturing precision and control of electrical characteristics become more difficult
Solution Approach 1:
A stacked structure comprising multiple oxide semiconductor layers with different compositions and properties is employed. This composite structure allows the overall layer to be thin enough for high-speed operation while the combination of layers maintains stable electrical characteristics and is more tolerant to manufacturing variations
Solution Approach 2:
Different regions of the oxide semiconductor structure have different thicknesses and compositions optimized for specific functions. The channel formation region has controlled thickness for high mobility, while other regions are optimized for stability and manufacturing tolerance, allowing local optimization of properties
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces parasitic capacitance, enhances the operation speed of thin film transistors, and improves the integration density of circuits while maintaining stable electrical characteristics, enabling high-speed and reliable performance in both driver circuits and pixel portions.
Implementation Method 1
dehydration or dehydrogenation, heat treatment is performed in an inert-gas atmosphere of nitrogen or a rare gas (such as argon or helium)
Implementation Method 2
oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely
Data Source
AI summary
One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.