Oxide Semiconductor Transistor Memory Data Retention
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Solution Overview
Problem
Volatile memories, such as SRAM and DRAM, suffer from data loss due to high leakage currents in silicon transistors, leading to short data retention times and loss of data during power down or voltage drops.
Innovation Solution
Incorporating an oxide semiconductor transistor with a wider band gap into the memory device, which reduces leakage current and extends data retention time, along with a data collision prevention switch to stabilize output voltages during power restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a volatile memory (SRAM or DRAM) is used for high-speed data processing, then data processing speed is improved, but data retention time becomes very short and data is lost during power down
Solution Approach 1:
The memory system is divided into two separate memory units: a volatile memory unit for high-speed data processing and a non-volatile memory unit for data retention. The volatile memory maintains fast write and read speeds, while the non-volatile memory preserves data during power down. A controller manages data synchronization between the two units, allowing the system to achieve both high processing speed and extended data retention without compromising either function.
2Duration of action of stationary object
If a DRAM with capacitor is used to extend data retention, then charge storage capability is improved, but high leakage current in silicon transistors causes charge loss in very short time
Solution Approach 1:
The transistor material is changed from conventional silicon to oxide semiconductor, which fundamentally alters the electrical parameters of the transistor. Oxide semiconductor transistors exhibit extremely low off-state leakage current (less than 10^-21 to 10^-24 A) due to their wide bandgap and intrinsic semiconductor properties. This material parameter change enables the capacitor to retain charge for extended periods without significant leakage, achieving data retention times of several hours to days while maintaining acceptable leakage levels.
3Duration of action of stationary object
If oxide semiconductor transistor is used to reduce leakage current, then data retention time is extended, but output port becomes unstable during power down with undefined potential
Solution Approach 1:
A control mechanism is implemented that detects power down conditions and preemptively isolates the output port from the volatile memory before the memory state becomes unstable. The controller monitors power supply voltage and, upon detecting a drop below a threshold level, activates a switch or tri-state buffer to disconnect the output port. This preliminary action prevents the output port from entering an undefined state, ensuring reliability during power transitions while allowing the non-volatile memory to maintain data retention.
4Reliability
If backup memory with oxide semiconductor transistor is added to extend retention, then data loss during power down is prevented, but device complexity increases
Solution Approach 1:
The volatile and non-volatile memory units are integrated into a unified memory system with a single controller that manages both units. The controller implements intelligent data synchronization, writing data to the non-volatile unit only when necessary (e.g., upon detecting power down conditions or at scheduled intervals). This merging approach allows the system to achieve data loss prevention while minimizing the operational overhead and structural complexity compared to fully redundant independent memory systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The oxide semiconductor transistor significantly reduces leakage current, extending data retention time and preventing data loss during power fluctuations, while the switch ensures data integrity by stabilizing output voltages during restarts.
Implementation Method 1
An oxide semiconductor has a much wider band gap than silicon. The wider the band gap of a semiconductor for a transistor is, the lower the off-state current of the transistor becomes.
Implementation Method 2
The output of the volatile memory becomes unstable in case of power down, and an undefined potential (undefined voltage) may appear at the output port of the volatile memory.
Data Source
AI summary
The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor.