Oxide Semiconductor Transistor Dual-Gate Structure
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Solution Overview
Problem
Current semiconductor devices using oxide semiconductors face challenges in achieving high on-state current, low off-state current, small area occupation, stable electrical characteristics, and high reliability, particularly in transistors with oxide semiconductor films.
Innovation Solution
The semiconductor device incorporates an oxide semiconductor film with a first gate electrode and a second gate electrode, surrounded by insulating films, where the oxide semiconductor film is connected to a pair of electrodes with a specific distance and thickness configuration, and includes a metal oxide film to inhibit impurity entry, forming a stacked-layer oxide film structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single gate electrode structure is used, then the device complexity is reduced, but the on-state current is insufficient and off-state current control is poor
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) positioned at opposite sides of the oxide semiconductor film. This segmentation allows independent control of electric fields on each side, enabling superior on-state current drive capability and off-state current suppression while maintaining a relatively simple overall structure.
Solution Approach 2:
The invention transitions from a single-plane gate structure to a three-dimensional configuration where gate electrodes are positioned on opposite sides of the semiconductor film. This dimensional change enables enhanced electric field control through the thickness direction, improving current characteristics without significantly increasing planar device complexity.
2Reliability
If the oxide semiconductor film is exposed to the environment, then the manufacturing process is simplified, but impurity entry reduces reliability
Solution Approach 1:
Thin insulating films are deposited on the upper and lower surfaces of the oxide semiconductor film to create a protective barrier against impurity entry. These thin films provide effective contamination protection while minimizing additional device complexity and maintaining the compact structure.
Solution Approach 2:
The oxide semiconductor film is nested within a structure where insulating films are positioned on both its upper and lower surfaces. This nested configuration creates a protected environment for the semiconductor film, preventing impurity entry from both top and bottom directions while maintaining a compact integrated structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the on-state current, reduces off-state current, and improves the reliability and stability of the semiconductor device by effectively surrounding the oxide semiconductor film with electric fields and protecting it from impurities, leading to improved current drive capability and mechanical strength.
Implementation Method 1
surrounding the oxide semiconductor film with electric fields
Data Source
AI summary
The semiconductor device includes a transistor including an oxide semiconductor film, a first gate electrode overlapping with the oxide semiconductor film, a gate insulating film between the oxide semiconductor film and the first gate electrode, a first insulating film over the oxide semiconductor film, a pair of electrodes that are over the first insulating film and electrically connected to the oxide semiconductor film, a second insulating film over the first insulating film and the pair of electrodes, and a second gate electrode that is over the second insulating film and overlaps with the oxide semiconductor film. The first insulating film includes a region having a thickness of 1 nm or more and 50 nm or less, and the pair of electrodes includes a region in which a distance between the electrodes is 1 μm or more and 6 μm or less.


