Oxide Semiconductor Transistor with Flat Insulating Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization of transistors leads to defects and short-channel effects due to poor coverage and increased electric field concentration, particularly in oxide semiconductor devices, which cannot control threshold voltage like silicon-based transistors.
Innovation Solution
A semiconductor device with a highly planarized structure, featuring an oxide semiconductor layer in contact with a surface of an insulating layer and electrodes, where the surface roughness is controlled to prevent disconnection and enhance electrical characteristics, using a high dielectric constant gate insulating material like hafnium oxide and ensuring a purified intrinsic oxide semiconductor with low carrier density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the thickness of the semiconductor layer is reduced for miniaturization, then the transistor size is reduced, but poor coverage and disconnection occur
Solution Approach 1:
The patent applies preliminary action by forming a base insulating layer with a highly flat surface (RMS roughness of 1 nm or less) before depositing the semiconductor layer. This pre-prepared flat surface ensures that even when the semiconductor layer is thin, it maintains uniform thickness and good coverage without disconnection, thus resolving the contradiction between miniaturization and coverage quality.
2Length of moving object
If the channel length is reduced for miniaturization, then the transistor size is reduced, but the short-channel effect increases
Solution Approach 1:
The patent changes the parameter of the gate insulating layer by using a high dielectric constant material with a dielectric constant of 25 or higher. This parameter change allows the gate to maintain effective control over the channel even when the channel length is reduced for miniaturization, thereby suppressing the short-channel effect while achieving smaller transistor sizes.
3Length of moving object
If the semiconductor layer thickness is reduced, then the transistor can be miniaturized, but uniform thickness becomes difficult to achieve
Solution Approach 1:
The patent prepares a highly flat insulating layer surface with RMS roughness of 1 nm or less before forming the semiconductor layer. This preliminary preparation of the substrate surface ensures that the subsequently deposited semiconductor layer achieves uniform thickness even when the layer is thin, thus maintaining manufacturing precision during miniaturization.
4Adaptability or versatility
If oxide semiconductor is used, then transparent electrode applications are enabled, but threshold voltage control by doping is not possible
Solution Approach 1:
The patent changes the approach to threshold voltage control from doping (which doesn't work for oxide semiconductors) to electric field control through a high dielectric constant gate insulating layer. By using a gate insulating layer with dielectric constant of 25 or higher, the patent achieves effective threshold voltage control while maintaining the versatility of oxide semiconductor applications.
Data Source
AI summary
Disclosed is a semiconductor device including an insulating layer, a source electrode and a drain electrode embedded in the insulating layer, an oxide semiconductor layer in contact with the insulating layer, the source electrode, and the drain electrode, a gate insulating layer covering the oxide semiconductor layer, and a gate electrode over the gate insulating layer. The upper surface of the surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less. There is a difference in height between an upper surface of the insulating layer and each of an upper surface of the source electrode and an upper surface of the drain electrode. The difference in height is preferably 5 nm or more. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization.