Stacked Oxide Semiconductor Transistor Structure for Integration Density
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Solution Overview
Problem
Miniaturization of transistors leads to deterioration of electrical characteristics such as on-state current, off-state current, threshold voltage, and subthreshold swing value, making it challenging to maintain high integration, low power consumption, and reliability while retaining data without a power supply.
Innovation Solution
A semiconductor device structure is implemented with multiple oxide semiconductor films and a gate insulating film, where the thickness of the first oxide semiconductor film is greater than the sum of the third oxide semiconductor film and the gate insulating film, and the gate electrode covers the second oxide semiconductor film, enhancing on-state current and reducing interface scattering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor channel length is decreased to increase integration density, then integration degree is improved, but off-state current increases and electrical characteristics deteriorate
Solution Approach 1:
The semiconductor film is divided into multiple stacked layers (first semiconductor film, second semiconductor film, third semiconductor film) with different thicknesses and material compositions. This segmentation allows each layer to contribute differently to carrier transport and scattering reduction, enabling high integration density while maintaining electrical characteristics through optimized layer-specific functions.
Solution Approach 2:
Different regions of the stacked semiconductor structure have locally optimized properties: the first semiconductor film has specific thickness for carrier generation, the second film has tailored composition for reduced scattering, and the third film provides interface optimization. This local quality optimization maintains electrical performance despite miniaturization.
2Productivity
If transistor channel width is decreased to increase integration density, then integration degree is improved, but on-state current decreases
Solution Approach 1:
The invention transitions from a two-dimensional channel structure to a three-dimensional stacked semiconductor film structure. By adding the vertical dimension with multiple film layers, the effective channel area is increased without increasing the planar footprint, thereby maintaining on-state current while achieving higher integration density through reduced channel width.
Solution Approach 2:
The stacked semiconductor structure uses composite material layers with different compositions and properties. The combination of multiple semiconductor films with optimized material characteristics enables enhanced carrier transport efficiency, compensating for the reduced channel width and maintaining on-state current at high integration densities.
3Power
If semiconductor film thickness is increased to increase on-state current, then on-state current is improved, but carrier scattering at interfaces increases
Solution Approach 1:
The thick semiconductor structure is segmented into multiple thinner film layers separated by controlled interfaces. This segmentation reduces the distance carriers must travel through high-scattering regions while maintaining the overall thickness needed for sufficient on-state current. Each interface is optimized to minimize scattering, allowing thick equivalent structure without proportional scattering penalty.
Solution Approach 2:
The invention changes the physical and chemical parameters at the semiconductor film interfaces, including composition gradients, crystallinity control, and interface roughness optimization. These parameter changes reduce carrier scattering at interfaces while maintaining the total film thickness required for high on-state current.
Data Source
AI summary
To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.