Oxide Semiconductor Transistor Light Protection and Alignment
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Solution Overview
Problem
The challenge is to manufacture miniaturized transistors with improved on-state characteristics and high yield, while preventing light degradation in oxide semiconductor devices used in high-definition display devices, where precise alignment and light protection are critical.
Innovation Solution
A method involving the formation of an oxide semiconductor layer between source and drain electrode layers, with a conductive layer on the side surfaces of the gate electrode layer to prevent light entry and enhance alignment precision, using a combination of coating methods and heat treatment to ensure high reliability and miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a transistor is miniaturized to achieve higher definition display, then the display resolution is improved, but the alignment precision between oxide semiconductor layer and gate electrode layer becomes more difficult to maintain
Solution Approach 1:
The oxide semiconductor layer is formed by a coating method (such as ink-jet method) before the gate electrode layer is formed. This preliminary formation allows the semiconductor layer to be precisely positioned and cured in place before subsequent processing steps, establishing a reference structure that simplifies later alignment operations and maintains precision even as transistor dimensions are reduced.
Solution Approach 2:
The patent replaces traditional photolithographic alignment methods with a coating-based formation method for the oxide semiconductor layer. This substitution eliminates the need for complex photolithography alignment steps, reducing the impact of miniaturization on alignment precision and enabling more accurate positioning of the semiconductor layer relative to the gate electrode layer.
2Reliability
If an Lov region is formed to improve on-state characteristics, then the on-state current is improved, but the device complexity increases due to additional alignment requirements
Solution Approach 1:
The gate electrode layer and the Lov region are formed as an integrated structure in a single coating step, rather than as separate components requiring independent alignment. This merging of functions into one formation process eliminates additional alignment requirements while maintaining the electrical benefits of the Lov region for improved on-state characteristics.
Solution Approach 2:
The gate electrode layer serves multiple functions simultaneously: it provides the primary gate control function and also forms the Lov region structure. This multi-functionality reduces the number of separate components and alignment steps needed, simplifying the overall device structure while maintaining improved on-state characteristics.
3Productivity
If the transistor is scaled down to increase pixel density, then the display definition is improved, but the yield decreases due to stricter alignment tolerances
Solution Approach 1:
The patent replaces photolithography-based pattern transfer with a direct coating method for forming the oxide semiconductor layer. This substitution eliminates the strict alignment tolerances associated with photolithography, enabling high pixel density achievement without the corresponding decrease in manufacturing yield that would result from tighter alignment requirements.
Solution Approach 2:
The oxide semiconductor layer is formed and cured in its final position before any other layers are deposited. This preliminary action establishes a fixed reference structure that subsequent layers can be aligned to, ensuring consistent positioning even at reduced transistor dimensions and maintaining high yield despite increased pixel density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of transistors with enhanced on-state characteristics and high reliability, maintaining high yield and preventing light-induced degradation, thus supporting the development of high-definition display devices.
Implementation Method 1
an oxide semiconductor layer is formed in a gap between these electrode layers by a coating method
Implementation Method 2
using a combination of coating methods and heat treatment to ensure high reliability and miniaturization
Data Source
AI summary
To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.