Oxide Semiconductor Transistor Side Surface Protection
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Solution Overview
Problem
Current transistors face challenges in achieving favorable electrical characteristics, stability, low power consumption, and high reliability, particularly in miniaturized forms where impurity diffusion and leakage currents are concerns.
Innovation Solution
A transistor design is implemented with an oxide semiconductor layer where the side surface is covered to prevent impurity diffusion, using a damascene process for the gate electrode and a protective layer to enhance reliability, and incorporating specific oxide semiconductor materials and structures to improve electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor is miniaturized to achieve high density, then the transistor density is improved, but impurity diffusion from side surfaces increases causing deterioration of electrical characteristics
Solution Approach 1:
The patent extends the gate electrode structure into the third dimension by forming side surface gates that wrap around and contact the side surfaces of the oxide semiconductor layer. This vertical/dimensional extension allows the gate to control impurity diffusion from side surfaces without increasing the planar footprint, thus maintaining high transistor density while preventing electrical characteristic deterioration.
Solution Approach 2:
The patent introduces an oxide semiconductor layer as an intermediary material covering the side surfaces of the oxide semiconductor layer where the channel is formed. This intermediary layer acts as a barrier to impurity diffusion from side surfaces while maintaining the miniaturized structure, thereby preventing electrical characteristic deterioration without sacrificing transistor density.
2Area of stationary object
If the transistor size is reduced for high density integration, then the device area is reduced, but leakage current increases due to surface effects
Solution Approach 1:
The gate electrode structure is extended into the vertical dimension to contact side surfaces of the oxide semiconductor layer. This three-dimensional gate configuration increases the effective gate control area without increasing the planar device footprint, allowing better suppression of leakage current through enhanced electric field control while maintaining small device area.
Solution Approach 2:
The patent uses thin oxide semiconductor films to cover the side surfaces of the channel-forming oxide semiconductor layer. These thin film structures provide effective surface passivation and leakage current suppression without adding significant device area, as the films conformally coat the vertical surfaces within the existing device footprint.
3Ease of manufacture
If conventional manufacturing processes are used, then the manufacturing simplicity is maintained, but the electrical characteristics and reliability are insufficient
Solution Approach 1:
The gate electrode is segmented into multiple parts: a planar gate electrode and vertical side surface gate electrodes. This segmentation allows independent optimization of each gate portion - the planar gate for main channel control and the side surface gates for impurity barrier functions - achieving superior electrical characteristics while using standard semiconductor manufacturing techniques for each segment.
Solution Approach 2:
The oxide semiconductor layer covering the side surfaces is formed to wrap around and enclose the channel-forming oxide semiconductor layer. This nested structure, where one oxide semiconductor layer contains another, creates an effective barrier against side surface impurity diffusion while maintaining manufacturing simplicity through conformal deposition processes.
Data Source
AI summary
To provide a transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device. By covering a side surface of an oxide semiconductor layer in which a channel is formed with an oxide semiconductor layer, diffusion of impurities into the inside from the side surface of the oxide semiconductor layer is prevented. By forming a gate electrode in a damascene process, miniaturization and high density of a transistor are achieved. By providing a protective layer covering a gate electrode over the gate electrode, the reliability of the transistor is increased.


