Oxide Semiconductor Device With Triple-Gate Segmented Insulation
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Solution Overview
Problem
Oxide semiconductor transistors have limited application in low power devices due to high threshold voltage and insufficient on-current, primarily because of the thicker gate insulation layer which restricts the gate voltage and drain voltage, limiting their use in low power devices.
Innovation Solution
The oxide semiconductor device incorporates a dual channel structure with three gate electrodes and two oxide semiconductor channel layers, allowing for enhanced on-current by adjusting the threshold voltage through bias voltage applied to the gate electrodes, while maintaining low leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the gate insulation layer is made thick to maintain low leakage current, then leakage current is reduced, but on-current is limited and threshold voltage becomes too high
Solution Approach 1:
The gate insulation layer is divided into multiple thin layers (first gate insulation layer, second gate insulation layer, third gate insulation layer) instead of using a single thick layer. This segmentation allows each layer to be optimized independently - the combined thickness provides sufficient insulation while the thin individual layers enable better electrical characteristics and lower threshold voltage, thus maintaining low leakage current while improving on-current
Solution Approach 2:
The gate insulation structure uses composite material configuration with different dielectric materials having different dielectric constants. The first gate insulation layer has a first dielectric constant, the second has a second dielectric constant, and the third has a third dielectric constant. This composite structure allows optimization of both leakage current (through total equivalent thickness) and on-current (through dielectric constant distribution), resolving the contradiction between these two parameters
2Object-generated harmful factors
If the gate insulation layer is made thick to maintain low leakage current, then leakage current is reduced, but threshold voltage becomes too high for low power devices
Solution Approach 1:
The gate insulation layer is divided into multiple thin layers (first gate insulation layer, second gate insulation layer, third gate insulation layer) instead of using a single thick layer. This segmentation allows each layer to be optimized independently - the combined thickness provides sufficient insulation while the thin individual layers enable better electrical characteristics and lower threshold voltage, thus maintaining low leakage current while improving on-current
Solution Approach 2:
The gate insulation structure uses composite material configuration with different dielectric materials having different dielectric constants. The first gate insulation layer has a first dielectric constant, the second has a second dielectric constant, and the third has a third dielectric constant. This composite structure allows optimization of both leakage current (through total equivalent thickness) and on-current (through dielectric constant distribution), resolving the contradiction between these two parameters
3Object-generated harmful factors
If the gate insulation layer is made thick to maintain low leakage current, then leakage current is reduced, but gate voltage and drain voltage become too high
Solution Approach 1:
The gate insulation layer is divided into multiple thin layers (first gate insulation layer, second gate insulation layer, third gate insulation layer) instead of using a single thick layer. This segmentation allows each layer to be optimized independently - the combined thickness provides sufficient insulation while the thin individual layers enable better electrical characteristics and lower threshold voltage, thus maintaining low leakage current while improving on-current
Solution Approach 2:
The gate insulation structure uses composite material configuration with different dielectric materials having different dielectric constants. The first gate insulation layer has a first dielectric constant, the second has a second dielectric constant, and the third has a third dielectric constant. This composite structure allows optimization of both leakage current (through total equivalent thickness) and on-current (through dielectric constant distribution), resolving the contradiction between these two parameters
Data Source
AI summary
An oxide semiconductor device includes an oxide semiconductor transistor including a first gate electrode, a second gate electrode, a third gate electrode, a first oxide semiconductor channel layer, a second oxide semiconductor channel layer, and two source/drain electrodes. The second gate electrode is disposed above the first gate electrode. The third gate electrode is disposed above the second gate electrode. At least a part of the first oxide semiconductor channel layer is disposed between the first gate electrode and the second gate electrode. At least a part of the second oxide semiconductor channel layer is disposed between the second gate electrode and the third gate electrode. At least a part of each source/drain electrode is disposed between the first oxide semiconductor channel layer and the second oxide semiconductor channel layer. Each source/drain electrode contacts the first oxide semiconductor channel layer and the second oxide semiconductor channel layer.