Oxide Semiconductor Vertical NAND Channel for High On Current

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Solution Overview

Problem

Current 3D NAND memory devices face challenges in achieving high 'on current' (ICELL), low sub-threshold slope, low select gate leakage, and low band-to-band carrier generation, which affect sensing margin, programming efficiency, and chip design complexity.

Innovation Solution

The use of an oxide semiconductor vertical NAND channel with a crystalline structure, specifically a metal oxide semiconductor, which provides high ICELL, low sub-threshold slope, and low select gate leakage without the need for high temperature anneal, thereby reducing defects and variability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional 3D NAND memory devices are used, then manufacturing process is simpler, but on current (ICELL) is insufficient and sub-threshold slope is high

Engineering Contradiction:
Improveon current (ICELL)VSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter of the channel from conventional silicon-based semiconductor to oxide semiconductor, which fundamentally alters the electrical characteristics to achieve high on current and low sub-threshold slope. This material parameter change enables superior device performance without requiring complex manufacturing process modifications

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs oxide semiconductor as a composite material system, specifically using materials like In-Ga-Zn-O (IGZO) that combine multiple elements to achieve desired electrical properties. This composite approach allows optimization of both on current and sub-threshold characteristics while maintaining manufacturing feasibility

Inventive Principle:
Principle #40Composite materials

2Reliability

If high temperature anneal is applied to improve channel performance, then on current increases, but defects and variability increase

Engineering Contradiction:
Improveon currentVSAvoiddefects and variability
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the processing temperature parameter by eliminating high temperature anneal steps. The oxide semiconductor channel achieves high performance through low-temperature fabrication processes, thereby avoiding the creation of defects and variability that would result from high temperature treatment

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the high temperature anneal process (which causes damage) with a low-temperature alternative process that achieves the same performance improvement without the harmful side effects. This substitution eliminates the need for costly defect repair and reduces manufacturing variability

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If conventional semiconductor channel is used, then manufacturing is easier, but select gate leakage is high

Engineering Contradiction:
Improveselect gate leakageVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the material composition parameter of the channel to oxide semiconductor, which inherently provides lower select gate leakage due to its unique electrical properties. This material change achieves superior leakage control without complicating the manufacturing process

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the conventional silicon-based semiconductor material with oxide semiconductor material, replacing a well-established but leakage-prone system with a newer material system that offers superior electrical characteristics including reduced select gate leakage

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Reliability

If conventional channel material is used, then fabrication process is simpler, but band-to-band carrier generation is high

Engineering Contradiction:
Improveband-to-band carrier generationVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the bandgap parameter by using oxide semiconductor material, which has a wider bandgap than conventional silicon-based semiconductors. This wider bandgap reduces band-to-band carrier generation, improving device reliability without requiring complex fabrication process modifications

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9634097B23D NAND with oxide semiconductor channel
Publication Date: 2017.04.25 SANDISK TECHNOLOGIES LLC
  • US9634097B2 patent drawing
  • US9634097B2 patent drawing
  • US9634097B2 patent drawing

AI summary

Disclosed herein are 3D NAND memory devices having an oxide semiconductor vertical NAND channel and methods for forming the same. The oxide semiconductor may have a crystalline structure. The channel of the vertically-oriented NAND string may be cylindrically shaped. The crystalline structure has an axis that may be aligned crystalline with respect to the cylindrical shape of the vertically-oriented channel substantially throughout the vertically-oriented channel. The crystalline structure may have a first axis that is aligned parallel to the vertical channel, a second axis that is aligned perpendicular to a surface of the cylindrically shaped channel, etc.