Oxide Semiconductor Wire Corrosion Suppression via Insulating Layer Step Structure
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Solution Overview
Problem
Conventional active matrix substrates experience corrosion issues in metal wires at wire connecting portions, particularly in oxide semiconductor TFTs, which affect the reliability and longevity of semiconductor devices.
Innovation Solution
A novel wire connection structure is introduced, featuring a substrate with a thin film transistor, an interlayer insulating layer, and a wire connecting portion. This structure includes a gate electrode, a gate insulating layer, an oxide semiconductor layer, a protection layer covering the channel region, and conductive portions with a specific step structure at the contact hole walls to reduce corrosion, utilizing the same electrically conductive film for the gate and source electrodes and incorporating an oxide semiconductor connecting portion between the protection and gate insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protection layer is added to cover the channel region of oxide semiconductor TFTs, then damage to the channel region from etching is reduced, but the number of manufacturing steps increases
Solution Approach 1:
The patent combines the protection layer formation with the gate insulating layer formation into a single step. The gate insulating layer serves dual purposes: as the insulating layer for the gate electrode and as the protection layer for the channel region. This merging eliminates the need for a separate protection layer deposition step while maintaining channel region protection during etching processes.
Solution Approach 2:
The gate insulating layer is designed to perform multiple functions simultaneously: it acts as the insulating layer between the gate electrode and oxide semiconductor layer, and also serves as the protection layer covering the channel region. This multi-functionality reduces the total number of layers and manufacturing steps while ensuring reliable channel protection.
2Ease of operation
If wire connecting portions are formed in oxide semiconductor TFTs, then electrical connections are established, but corrosion of metal wires occurs at the connecting portions
Solution Approach 1:
The patent introduces an intermediate insulating layer between the metal wires at the wire connecting portions. This intermediate layer acts as a barrier that prevents direct contact between adjacent metal wires, thereby suppressing corrosion while still allowing electrical connections to be established through the wire connecting portions. The insulating layer is strategically placed only where corrosion risk exists.
Solution Approach 2:
The insulating layer is applied selectively at the wire connecting portions where corrosion occurs, rather than uniformly across the entire device. This localized application provides corrosion protection exactly where needed while minimizing the overall addition of materials and manufacturing complexity.
3Speed
If oxide semiconductor TFTs are used instead of amorphous silicon or polycrystalline silicon, then higher mobility and faster operation speed are achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent merges the formation of the gate insulating layer and protection layer into a single step, reducing the number of deposition processes required for oxide semiconductor TFTs. This integration helps offset the inherent complexity of working with oxide semiconductor materials while maintaining the high mobility and fast operation speed benefits.
Data Source
AI summary
A semiconductor device includes a thin film transistor including an oxide semiconductor layer and a wire connecting portion (201). The wire connecting portion (201) includes a lower electrically-conductive portion (3t) formed out of a same electrically-conductive film as the gate electrode, an insulating layer (15) having a contact hole (CH2) through which at least a part of the lower electrically-conductive portion (3t) is exposed, and an upper electrically-conductive portion (19t), at least a part of which is provided inside the contact hole (CH2). The insulating layer (15) includes the gate insulating layer (4), the protection layer (9) and the interlayer insulating layer (13). At a lateral wall of the contact hole, the gate insulating layer (4) includes an upper portion (41) and a lower portion (42) which is present on the substrate side of the upper portion (41), and when viewed in a normal direction of the substrate, a lateral surface of the lower portion (42) juts out from a lateral surface of the upper portion (41). The upper electrically-conductive portion (19t) is in contact with the lower electrically-conductive portion (3t) and the lateral surface and an upper surface of the lower portion (42) of the gate insulating layer (4) inside the contact hole.