N-type Oxide Shift Register for Large Display Pulse Control
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Solution Overview
Problem
Existing light emission control drivers for large-sized display panels using oxide thin film transistors face challenges in determining the pulse width of light emission control signals, requiring multiple control signals and complex circuit structures, which complicates the design and increases the number of control signals needed.
Innovation Solution
A shift register design utilizing N-type oxide thin film transistors with specific clock signal configurations and circuit architectures that allow the pulse width of the output signal to be directly controlled by the input signal, reducing the number of control signals required and simplifying the circuit connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If other types of thin film transistors are used in light emission control drivers for large-sized display panels, then the applicability to large-sized panels is improved, but the circuit structure complexity and number of control signals increase
Solution Approach 1:
The patent extracts and eliminates the need for initialization control signals and multiple clock signal phases by redesigning the shift register circuit. The output signal pulse width is directly determined by the input signal duration, removing the complexity of separate initialization and control signal sequences that were previously required.
Solution Approach 2:
The shift register circuit is designed to perform multiple functions using a unified structure: it directly transfers the input signal duration to the output signal pulse width, simultaneously achieving signal transmission, pulse width determination, and light emission control without requiring separate dedicated circuits for each function.
2Measurement precision
If multiple control signals are used to determine pulse width, then the light emission control precision is improved, but the number of control signals and wiring complexity increase
Solution Approach 1:
The shift register circuit serves itself by using the input signal's own duration to directly determine the output signal's pulse width. The circuit automatically transfers the temporal characteristics of the input signal to the output signal without requiring external control signals to specify the pulse width, achieving self-determined pulse generation.
Solution Approach 2:
The input signal is designed to inherently contain the desired pulse width information before being applied to the shift register. The circuit preserves this pre-encoded temporal information through direct signal transfer, eliminating the need for subsequent control signals to modify or determine the pulse width after the signal enters the circuit.
3Measurement precision
If complex circuit structures are used to control pulse width, then the signal control accuracy is improved, but the ease of manufacture and wiring simplicity deteriorate
Solution Approach 1:
The patent changes the control approach from using multiple control signal parameters (phases, initialization signals) to using a single parameter: the input signal duration. By transforming the control mechanism to rely on the temporal parameter of the input signal itself, the circuit achieves accurate pulse width control with simpler wiring and easier manufacturing.
Data Source
AI summary
A shift register includes: an input circuit configured to receive an input signal; a first control circuit configured to control, in response to a second clock signal and a voltage at a second node, a voltage at the first node; a second control circuit configured to control, in response to a first clock signal, the second clock signal, and the voltage at the first node, a voltage at the second node, and control, in response to the second clock signal and the voltage at the first node, a voltage at the fifth node; and an output circuit configured to transmit, in response to an active level at the first node, a second power signal to an output signal terminal, and transmit, in response to an active level at the fifth node, the first power signal to the output signal terminal. All transistors included in the shift register are N-type transistors.