Oxide Semiconductor Stack for Ambipolar FET Isolation

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Solution Overview

Problem

As semiconductor devices continue to reduce minimum feature sizes for increased integration density, challenges arise in manufacturing complexity and material selection for multilayer channels, particularly in achieving ambipolar devices that function as both n-FET and p-FET.

Innovation Solution

The implementation of a multilayer channel comprising both an n-type and a p-type oxide semiconductor layer, stacked and electrically isolated, allows the semiconductor device to operate as either an n-FET or a p-FET, utilizing various deposition techniques for material selection and simplifying manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but manufacturing complexity and material selection challenges increase

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The channel layer is segmented into multiple sub-layers with different semiconductor types (n-type and p-type). Each sub-layer can be independently formed and controlled, allowing complex device functionality to be achieved through simpler, modular manufacturing steps rather than attempting to create the entire channel structure in a single complex process

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The channel structure uses composite materials consisting of multiple semiconductor layers with different electrical properties (n-type and p-type). This composite approach enables ambipolar device functionality where the same physical structure can operate in different modes, reducing the need for separate n-FET and p-FET fabrication processes

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If multilayer channels with both n-type and p-type layers are implemented to create ambipolar devices, then device versatility is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice versatilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The multilayer channel structure serves multiple functions: it can operate as an n-FET when the n-type layer is activated, as a p-FET when the p-type layer is activated, and potentially as an ambipolar device that can switch between modes. This universal structure eliminates the need for separate fabrication processes for different device types, actually simplifying overall manufacturing despite the complex internal structure

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Different regions of the channel structure have different semiconductor types tailored to specific functional requirements. The n-type layer handles electron transport while the p-type layer handles hole transport, with each layer optimized for its specific purpose. This local differentiation enables versatile device operation without requiring entirely different structures for different device types

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12538525B2Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2026.01.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12538525B2 patent drawing
  • US12538525B2 patent drawing
  • US12538525B2 patent drawing

AI summary

A semiconductor device includes an oxide semiconductor stack, a first gate, a first contact structure, and a second contact structure. The oxide semiconductor stack includes an n-type oxide semiconductor layer and a p-type oxide semiconductor layer stacked on each other. The first gate is over the oxide semiconductor stack. The first contact structure and the second contact structure are at opposite sides of the first gate and electrically connected to the oxide semiconductor stack.