Oxide Semiconductor Stack with Planarized Metal Oxide Interface
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Solution Overview
Problem
Semiconductor devices with oxide semiconductors face challenges in maintaining high mobility and reliability due to oxygen deficiencies and surface roughness issues, which affect the crystallinity and field-effect mobility of the oxide semiconductor layer.
Innovation Solution
A semiconductor device configuration featuring a metal oxide layer with aluminum as the main component, where the surface is planarized to reduce roughness, and a specific relationship between the arithmetic mean roughness of the metal oxide layer and field-effect mobility is established, enabling improved crystal growth and increased mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a planarization process is performed on the metal oxide layer to reduce surface roughness, then field-effect mobility is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies a planarization process to the metal oxide layer before forming the oxide semiconductor layer to pre-establish a flat surface. This preliminary action ensures that the subsequent oxide semiconductor layer forms on a uniform surface, improving crystal growth and field-effect mobility without requiring complex post-processing steps.
Solution Approach 2:
The patent controls the surface roughness of the metal oxide layer by adjusting the planarization process parameters to achieve a specific arithmetic mean roughness (Ra) value. By optimizing this physical parameter, the patent improves the interface quality between the metal oxide layer and oxide semiconductor layer, thereby enhancing field-effect mobility while maintaining a manageable manufacturing process.
2Manufacturing precision
If the oxide semiconductor layer is formed to achieve high field-effect mobility, then device performance is improved, but reliability decreases due to oxygen deficiencies
Solution Approach 1:
The patent creates a composite structure consisting of a metal oxide layer (containing aluminium as main component) and an oxide semiconductor layer. This composite structure leverages the oxygen-rich properties of the metal oxide layer to supply oxygen to the oxide semiconductor layer, thereby improving reliability by reducing oxygen deficiencies while maintaining the high mobility characteristics of the oxide semiconductor material.
Solution Approach 2:
The metal oxide layer acts as an intermediary between the substrate and the oxide semiconductor layer. It serves as an oxygen source that supplies oxygen to the oxide semiconductor layer during and after formation, preventing oxygen deficiencies that would otherwise degrade device reliability. This intermediary layer enables the oxide semiconductor to achieve both high mobility and high reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances field-effect mobility to 40 cm2/Vs or higher by aligning crystal growth direction and speed, improving both initial characteristics and reliability test results of the semiconductor device.
Implementation Method 1
performing a planarization process on a surface of the first metal oxide layer
Implementation Method 2
forming an oxide semiconductor layer on the insulating surface on which the planarization process was performed
Implementation Method 3
forming a gate insulating layer above the oxide semiconductor layer
Data Source
AI summary
A method for manufacturing a semiconductor device, the method comprising steps of: forming a first metal oxide layer containing aluminium as a main component above an insulating surface; performing a planarization process on a surface of the first metal oxide layer; forming an oxide semiconductor layer on the insulating surface on which the planarization process is performed; forming a gate insulating layer above the oxide semiconductor layer; and forming a gate electrode facing the oxide semiconductor layer above the gate insulating layer.