Oxide Supporter for DRAM Capacitor Electrode Stability
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Solution Overview
Problem
The manufacturing process of capacitor lower electrodes in micro stacked DRAMs faces challenges in increasing the supporting force and uniformity of these electrodes, leading to difficulties in disposing the dielectric and upper electrodes, and potential toppling due to their small size and varying shapes.
Innovation Solution
A process involving the formation of a stacked structure with polysilicon and nitride layers, followed by oxidation to create silicon dioxide supporters around vias, which enhances the supporting force and uniformity of the electrodes, preventing toppling and shape distortion during the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of capacitor lower electrodes is reduced to increase memory cell density, then the data capacity of DRAM is improved, but the supporting force of capacitor lower electrodes becomes weak causing toppling
Solution Approach 1:
Silicon dioxide supporters are introduced as intermediary structures between the capacitor lower electrodes and the substrate. These supporters act as mediators that provide mechanical support to the reduced-size electrodes, preventing toppling while allowing the electrodes to maintain their small dimensions for high density
Solution Approach 2:
The structure combines multiple materials (silicon dioxide supporters, capacitor lower electrodes made of various materials, dielectric layers) to create a composite system. The silicon dioxide provides mechanical strength while the electrode materials provide electrical function, achieving both high density and structural stability
2Productivity
If the size of capacitor lower electrodes is reduced to increase memory cell density, then the data capacity of DRAM is improved, but the difficulty of disposing capacitor dielectric layer and upper electrode increases
Solution Approach 1:
The silicon dioxide supporters are formed in advance before the capacitor dielectric layer and upper electrode are disposed. This preliminary action creates a stable foundation that facilitates subsequent manufacturing steps, making it easier to handle and position the dielectric and upper electrode on the small electrodes
Solution Approach 2:
The silicon dioxide supporters serve as intermediary structures that simplify the manufacturing process. They provide a stable platform that makes it easier to dispose the dielectric layer and upper electrode, reducing the difficulty associated with handling small-scale components
3Ease of manufacture
If etching area is formed to enable etching process, then the capacitor lower electrodes can be shaped, but the electrodes have different shapes affecting electrical property
Solution Approach 1:
The etching area formation step is removed from the manufacturing process. Instead of using etching areas to shape the electrodes, the invention uses deposition and oxidation processes to form uniform silicon dioxide supporters and electrodes, eliminating the source of shape variation
Solution Approach 2:
The process is designed to create homogeneous capacitor lower electrodes with uniform shapes. By using deposition and oxidation rather than etching, all electrodes receive the same treatment and develop consistent geometries, ensuring uniform electrical properties across the array
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process increases the supporting force of the capacitor lower electrodes, reduces the complexity of adding dielectric and upper electrodes, and ensures consistent shape and electrical properties by eliminating the need for an etching area, thereby preventing toppling and maintaining electrode stability.
Implementation Method 1
oxidize the polysilicon layer to form a plurality of silicon dioxides surround the vias
Data Source
AI summary
A process using oxide supporter for manufacturing a capacitor lower electrode of a micron stacked DRAM is disclosed. First, form a stacked structure. Second, form a photoresist layer on an upper oxide layer and then etch them. Third, deposit a polysilicon layer onto the upper oxide layer and the nitride layer. Fourth, deposit a nitrogen oxide layer on the polysilicon layer and the upper oxide layer. Sixth, partially etch the nitrogen oxide layer, the polysilicon layer and the upper oxide layer to form a plurality of vias. Seventh, oxidize the polysilicon layer to form a plurality of silicon dioxides surround the vias. Eighth, etch the nitride layer, the dielectric layer and the lower oxide layer beneath the vias. Ninth, form a metal plate and a capacitor lower electrode in each of the vias. Tenth, etch the nitrogen oxide layer, the polysilicon layer, the nitride layer and the dielectric layer.