Oxide Semiconductor TFT Interfacial Stability Layer
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Solution Overview
Problem
Thin film transistors (TFTs) using oxide semiconductors as active layers face reliability issues due to charge trapping at the interface between the active layer and insulating or passivation layers, leading to unstable electrical characteristics and threshold voltage changes over time.
Innovation Solution
Incorporating an interfacial stability layer with a band gap of 3.0 to 8.0 eV on one or both surfaces of the active layer, formed from oxides like SiOx or AlOx, to enhance chemical stability and prevent charge trapping, thereby maintaining consistent electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an oxide semiconductor is used as an active layer, then manufacturing cost is reduced and large-sized substrates can be processed, but electrical characteristics become unstable due to charge trapping at interfaces
Solution Approach 1:
An interfacial stability layer is introduced as an intermediary between the oxide semiconductor active layer and the gate insulating layer or passivation layer. This intermediate layer prevents direct contact and charge trapping at the interface, thereby maintaining electrical characteristic stability while preserving the manufacturing advantages of oxide semiconductors.
Solution Approach 2:
The structure employs a composite material approach by combining the oxide semiconductor active layer with a specifically designed interfacial stability layer having appropriate band gap characteristics (3.0 to 8.0 eV). This composite structure leverages the low-cost, large-substrate benefits of oxide semiconductors while adding the stability properties of the interfacial layer to prevent charge trapping.
2Device complexity
If no interfacial stability layer is used, then device structure is simpler, but charge trapping occurs at the interface leading to threshold voltage changes
Solution Approach 1:
The interfacial stability layer serves as a mediator that prevents charge trapping between the active layer and insulating/passivation layers. Although it adds a layer to the structure, it significantly improves reliability by preventing threshold voltage shifts, making it a necessary component for stable device operation.
3Ease of manufacture
If the active layer interface deteriorates, then manufacturing process is simpler, but charge trapping occurs reducing reliability
Solution Approach 1:
The interfacial stability layer is formed in advance during the manufacturing process, before the device is put into service. This preliminary action of creating a stable interface structure prevents charge trapping from occurring during device operation, thereby ensuring long-term reliability without complicating the overall manufacturing approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interfacial stability layer ensures high reliability and stable electrical performance of TFTs, minimizing changes in threshold voltage and improving mobility, which enhances the performance of TFTs in flat panel display devices.
Implementation Method 1
an interfacial stability layer which is formed on one or both of top and bottom surfaces of the active layer, and comprises an oxide having a band gap of 3.0 to 8.0 eV
Implementation Method 2
the oxide semiconductor is deposited using a sputtering method
Data Source
AI summary
A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include source and drain electrodes formed on a substrate; an active layer formed of an oxide semiconductor disposed on the source and drain electrodes; a gate electrode; and an interfacial stability layer formed on at least one of top and bottom surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristics as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.