Oxide Semiconductor TFT Blocking Layer Design

Solution Overview

Problem

The manufacturing of thin film transistor array panels using oxide semiconductors is costly and complex due to the need for an etching prevention layer and separate masks for forming source and drain electrodes, which increases the number of manufacturing steps.

Innovation Solution

A thin film transistor array panel design that includes a blocking layer with different material portions, where the oxide semiconductor, source, and drain electrodes are formed using a single photolithography process, eliminating the need for a separate etching stop layer and reducing the complexity of the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an etching prevention layer and separate masks are used to form source and drain electrodes on oxide semiconductor, then the semiconductor layer is protected from damage, but manufacturing costs increase and the manufacturing process becomes complicated

Engineering Contradiction:

Improveprotection of semiconductor layerVSAvoidmanufacturing process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The gate insulating layer is designed to serve dual functions: as the gate dielectric layer and as the etching prevention layer. This merging eliminates the need for a separate etching prevention layer and reduces the number of masks required, simplifying the manufacturing process while maintaining protection of the oxide semiconductor layer during etching of source and drain electrodes

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The gate insulating layer performs multiple functions simultaneously: it acts as the gate dielectric for transistor operation, serves as the etching prevention layer to protect the oxide semiconductor, and provides the base layer for forming the blocking layer pattern. This multi-functionality reduces the total number of layers and manufacturing steps

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If an etching prevention layer and separate masks are used to form source and drain electrodes, then the semiconductor layer is protected from damage, but manufacturing costs increase

Engineering Contradiction:

Improveprotection of semiconductor layerVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The gate insulating layer is designed to serve dual functions: as the gate dielectric layer and as the etching prevention layer. This merging eliminates the need for a separate etching prevention layer and reduces the number of masks required, simplifying the manufacturing process while maintaining protection of the oxide semiconductor layer during etching of source and drain electrodes

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The gate insulating layer performs multiple functions simultaneously: it acts as the gate dielectric for transistor operation, serves as the etching prevention layer to protect the oxide semiconductor, and provides the base layer for forming the blocking layer pattern. This multi-functionality reduces the total number of layers and manufacturing steps

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If a single photolithography process is used to form oxide semiconductor, blocking layer, and source/drain electrodes, then manufacturing steps are reduced, but precision of electrode formation may be compromised

Engineering Contradiction:

Improvemanufacturing efficiencyVSAvoidelectrode formation precision

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The blocking layer is divided into two portions with different materials: a first portion (blocking layer pattern) that remains after etching to define electrode positions, and a second portion that is removed. This segmentation allows the single photolithography process to achieve precise electrode formation by using the first portion as an in-situ mask during subsequent etching steps

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The blocking layer is formed with different materials in different regions before the etching process. The first portion is specifically designed to remain during etching to serve as a preliminary mask, ensuring precise electrode formation. This preliminary differentiation of materials enables accurate pattern transfer in the single photolithography process

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8618538B2Thin film transistor array panel and manufacturing method thereof

Publication Date: 2013.12.31 SAMSUNG DISPLAY CO LTD

AI summary

A thin film transistor array panel is provided that includes: a gate electrode that is disposed on an insulating substrate; a gate insulating layer that is disposed on the gate electrode; an oxide semiconductor that is disposed on the gate insulating layer; a blocking layer that is disposed on the oxide semiconductor; a source electrode and a drain electrode that are disposed on the blocking layer; a passivation layer that is disposed on the source electrode and drain electrode; and a pixel electrode that is disposed on the passivation layer. The blocking layer includes a first portion that is covered by the source electrode and drain electrode and a second portion that is not covered by the source electrode and drain electrode, and the first portion and the second portion include different materials.