Oxide TFT Buffer Layer Structure for Low-Resistance Contacts

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Solution Overview

Problem

Thin film transistors using oxide semiconductor films for channel formation regions face challenges with high contact resistance and low frequency characteristics due to direct contact with metal electrode layers, leading to signal delay and display unevenness in large-area display devices.

Innovation Solution

An inverted-staggered thin film transistor structure is implemented with an oxide semiconductor layer containing indium (In), gallium (Ga), and zinc (Zn), where a buffer layer with higher carrier concentration than the semiconductor layer is introduced between the oxide semiconductor layer and the source and drain electrode layers to reduce contact resistance and parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If metal material with low resistance is used for source and drain electrode layers, then wiring resistance is reduced, but contact resistance between oxide semiconductor film and electrode layers increases due to Schottky junction formation

Engineering Contradiction:
Improvewiring resistanceVSAvoidcontact resistance
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

A buffer layer made of oxide semiconductor is introduced between the metal electrode layer and the oxide semiconductor film. This buffer layer acts as an intermediary that prevents direct contact between the metal and the semiconductor, thereby avoiding Schottky junction formation and reducing contact resistance while still allowing efficient electrical connection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The carrier concentration of the buffer layer is controlled to be higher than that of the oxide semiconductor film. By changing the electrical parameters (carrier concentration) of the buffer layer, it achieves low resistance contact with both the metal electrode and the oxide semiconductor film, resolving the contradiction between low wiring resistance and low contact resistance.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If oxide semiconductor film is directly contacted with source and drain electrode layers, then manufacturing process is simplified, but frequency characteristics deteriorate due to increased parasitic capacitance

Engineering Contradiction:
Improveprocess simplicityVSAvoidfrequency characteristics
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The buffer layer serves as an intermediary structure between the oxide semiconductor film and the electrode layers. While it adds an additional layer, it significantly reduces parasitic capacitance by preventing direct large-area contact, thereby improving frequency characteristics with minimal impact on manufacturing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is selectively formed only in regions where electrode contacts are needed, rather than throughout the entire device. This localized approach maintains process simplicity while achieving the desired reduction in parasitic capacitance at critical contact points.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240145599A1Semiconductor device and manufacturing method thereof
Publication Date: 2024.05.02 SEMICON ENERGY LAB CO LTD
  • US20240145599A1 patent drawing
  • US20240145599A1 patent drawing
  • US20240145599A1 patent drawing

AI summary

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.