Oxide Semiconductor TFT With Buffer Layer For Threshold Voltage Control
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Solution Overview
Problem
Oxide semiconductor thin film transistors (TFTs) face challenges with heat resistance and threshold voltage control, leading to increased leakage current and complex circuit configurations due to lattice defects and hydrogen introduction during manufacturing, making it difficult to form P-channel transistors and maintain stable electrical properties.
Innovation Solution
A thin film transistor design incorporating a fixed charge storage layer and a buffer layer made of insulating materials, such as silicon oxide, between the oxide semiconductor active layer and the gate insulating layer, with a fixed charge control electrode positioned to control electron discharge and shift the threshold voltage to the positive side without damaging the gate insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heat treatment is performed in the TFT manufacturing process, then oxygen atoms, zinc atoms or the like are diffused in the oxide semiconductor to form lattice defect, but this reduces the threshold voltage and increases leakage current
Solution Approach 1:
A buffer layer is introduced as an intermediary between the gate insulating layer and the oxide semiconductor active layer. This buffer layer prevents direct interaction between the gate insulating layer and the oxide semiconductor, thereby preventing hydrogen diffusion into the oxide semiconductor that would create shallow impurity levels and increase leakage current.
Solution Approach 2:
The harmful hydrogen is extracted or prevented from entering the oxide semiconductor active layer by the buffer layer. The buffer layer acts as a barrier that takes out the harmful element (hydrogen) from the system, preventing it from reaching the oxide semiconductor and causing threshold voltage reduction and leakage current increase.
2Ease of manufacture
If hydrogen is introduced in TFT manufacturing processes, then shallow impurity level is created in the oxide semiconductor, but this increases carrier concentration and makes threshold voltage negative
Solution Approach 1:
The buffer layer serves as an intermediary barrier between the gate insulating layer and the oxide semiconductor active layer, preventing hydrogen from the gate insulating layer or manufacturing processes from diffusing into the oxide semiconductor. This maintains proper threshold voltage control while allowing standard manufacturing processes to continue.
3Reliability
If fixed charge is applied to the gate insulating layer to cause depletion, then threshold voltage can be adjusted, but this damages the gate insulating layer
Solution Approach 1:
The buffer layer acts as a protective intermediary between the gate insulating layer and the oxide semiconductor active layer. It enables threshold voltage adjustment through its own properties without requiring fixed charge application to the gate insulating layer, thereby preserving the gate insulating layer integrity while achieving the desired threshold voltage adjustment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively shifts the threshold voltage to the positive side, stabilizes electrical properties, and prevents degradation of the gate insulating layer, enabling the use of oxide semiconductor TFTs in display devices with enhanced reliability and reduced circuit complexity.
Implementation Method 1
the buffer layer is formed of an insulating material and is configured to control a discharge of electrons stored in the fixed charge storage layer
Implementation Method 2
a fixed charge control electrode formed over the fixed charged storage layer
Data Source
AI summary
A thin film transistor is provided that includes a gate electrode, a source electrode, and a drain electrode, an oxide semiconductor active layer formed over the gate electrode, a fixed charge storage layer formed over a portion of the oxide semiconductor active layer, and a fixed charge control electrode formed over the fixed charged storage layer.


