Staggered Oxide TFT Buffer Layer Contact Resistance

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Solution Overview

Problem

Thin film transistors with oxide semiconductor films face challenges in achieving high-speed operation and reliability due to increased contact resistance and capacitance, particularly in large-area display devices, which affects signal delay and display uniformity.

Innovation Solution

A staggered thin film transistor structure is implemented with an oxide semiconductor film containing indium, gallium, and zinc, using a buffer layer with higher carrier concentration than the semiconductor layer to reduce contact resistance and parasitic capacitance, and optimizing the carrier concentration range to prevent the transistor from becoming normally on.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a low resistance metal material is used for source and drain electrodes to reduce signal delay, then electrical conductivity is improved, but contact resistance increases due to Schottky junction formation

Engineering Contradiction:
Improvesignal delayVSAvoidcontact resistance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

An oxide semiconductor buffer layer is introduced as an intermediary between the low-resistance metal electrode and the oxide semiconductor film. This buffer layer has higher carrier concentration than the main semiconductor film, enabling ohmic contact while maintaining the low resistance properties of the metal electrode. The buffer layer acts as a mediator that prevents Schottky junction formation at the electrode-semiconductor interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The oxide semiconductor buffer layer is selectively formed only in the contact regions between the source/drain electrodes and the semiconductor film, while the channel region maintains its original lower carrier concentration. This local differentiation allows the contact regions to have high conductivity (reducing signal delay) while the channel region maintains proper transistor characteristics.

Inventive Principle:
Principle #3Local quality

2Device complexity

If source and drain electrodes are in direct contact with oxide semiconductor film to reduce manufacturing complexity, then device structure is simplified, but parasitic capacitance increases hindering high speed operation

Engineering Contradiction:
Improvestructure complexityVSAvoidoperation speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The oxide semiconductor buffer layer serves as a mediator between the electrode and the main semiconductor film. By controlling the thickness and carrier concentration of this buffer layer, parasitic capacitance is reduced while maintaining electrical connectivity. The buffer layer's higher carrier concentration creates a depletion region that minimizes capacitive coupling between the electrode and the channel-forming semiconductor film.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If oxide semiconductor film with high carrier concentration is used to reduce contact resistance, then electrical conductivity is improved, but transistor becomes normally on state

Engineering Contradiction:
Improvecontact resistanceVSAvoidtransistor control
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The oxide semiconductor structure is differentiated into two regions with different carrier concentrations: a buffer layer with high carrier concentration (1×10^19 to 1×10^21 cm^-3) at the electrode contact regions for low contact resistance, and a main semiconductor film with lower carrier concentration (1×10^16 to 1×10^18 cm^-3) in the channel region for proper transistor switching control. This spatial differentiation of electrical properties resolves the contradiction between contact resistance and transistor controllability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a thin film transistor with reduced contact resistance, improved frequency characteristics, and enhanced reliability, enabling high-speed and reliable operation with reduced variation in electric properties and display uniformity.

Implementation Method 1

a buffer layer which has a higher carrier concentration than the semiconductor layer is used, contact resistance can be reduced

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

capacitance is formed in a portion where the source and drain electrodes and the oxide semiconductor film have a direct contact with each other, and there are risks that frequency characteristics (called 'f characteristics') decrease

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS9105659B2Semiconductor device and method for manufacturing the same
Publication Date: 2015.08.11 SEMICON ENERGY LAB CO LTD
  • US9105659B2 patent drawing
  • US9105659B2 patent drawing
  • US9105659B2 patent drawing

AI summary

An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.