Oxide TFT Step Coverage Compensation Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flat panel display devices with oxide thin film transistors face issues of disconnection and short-circuit faults due to poor taper and interface characteristics of SiO2-based insulation films, leading to un-uniform thickness and disconnection in step coverage regions, causing electrical shunting between electrodes and signal lines.
Innovation Solution
The implementation of step coverage compensation patterns at intersections of electrodes and signal lines, formed simultaneously with the etch stopper, to prevent disconnection and short-circuit faults without additional fabrication processes, using indium gallium zinc oxide (IGZO) as the oxide channel layer and SiO2-based passivation layers, with the compensation patterns being thicker than the etch stopper to compensate for step coverage issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiO2-based insulation film is used for gate insulation layer and passivation layer, then insulation characteristics are improved, but taper and interface characteristics deteriorate leading to un-uniform thickness and disconnection in step coverage regions
Solution Approach 1:
The patent forms compensation patterns (made of oxide semiconductor material) in advance at the step coverage regions where disconnection is likely to occur. These compensation patterns are created before forming the passivation layer, so they can preemptively compensate for the poor step coverage of SiO2-based insulation films. The compensation patterns have a thickness greater than the expected disconnection depth, ensuring that even if the passivation layer becomes disconnected, the underlying compensation patterns maintain electrical continuity.
Solution Approach 2:
The compensation patterns act as an intermediary layer between the gate electrode/gate line and the passivation layer. This intermediary structure compensates for the poor interface characteristics of SiO2-based insulation films by providing a transition region that improves step coverage. The compensation patterns are formed of oxide semiconductor material which has better conformal deposition characteristics, thereby mediating the interface between thick gate structures and the passivation layer.
2Reliability
If channel layer is formed from oxide material to enhance transistor characteristics, then switching performance is improved, but additional process complexity is introduced for forming compensation patterns
Solution Approach 1:
The patent merges the formation of compensation patterns with the existing oxide channel layer formation process. Both the channel layer and compensation patterns are made of oxide semiconductor material and can be formed in the same deposition chamber using the same sputtering or ALD process. The compensation patterns are formed by depositing oxide semiconductor material on specific regions (gate electrodes, gate lines, and their intersections) before or during the channel layer formation, thereby combining two functions into one material deposition step.
Solution Approach 2:
The compensation patterns are formed with local quality - they are placed only at specific critical regions (gate electrodes, gate lines, and their intersections) rather than uniformly across the entire substrate. This localized approach ensures that the additional structure is created only where needed to prevent disconnection, minimizing unnecessary process complexity while maintaining transistor performance benefits from oxide channel material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents disconnection and short-circuit faults by compensating for step coverage in the gate electrode and gate line regions, ensuring uniform thickness and preventing electrical shunting, thereby enhancing the reliability of the thin film transistor in flat panel display devices.
Implementation Method 1
forming a gate electrode and a gate line, and the gate line and a data line which will be formed through the following process crossing each other and defining a pixel region on a substrate; forming a gate insulation layer on the substrate provided with the gate electrode and the gate line; forming a pixel electrode in the pixel region on the gate insulation layer; forming an oxide channel layer over the gate electrode, wherein the gate insulation layer is between the oxide channel layer and the gate electrode
Implementation Method 2
The oxide channel layer may be formed from indium gallium zinc oxide IGZO
Data Source
AI summary
A flat panel display device with oxide thin film transistors and a fabricating method thereof are disclosed. The flat panel display device includes: a substrate; gate lines and data lines formed to cross each other and define a plurality of pixel regions on the substrate; the thin film transistors each including an oxide channel layer which is formed at an intersection of the gate and data lines; a pixel electrode and a common electrode formed in the pixel region with having a passivation layer therebetween; and step coverage compensation patterns formed at a step portion formed by the gate line and a gate electrode of the thin film transistor.