Oxide Semiconductor TFT Composition for High-Mobility Display Backplanes
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Solution Overview
Problem
Existing thin-film transistors face challenges with mobility, reliability, and manufacturing costs, particularly in oxide semiconductor TFTs, due to issues with oxygen content, defect density, and temperature sensitivity, limiting their application in large-sized and high-resolution displays.
Innovation Solution
A thin-film transistor with an oxide semiconductor layer composed of indium (In), gallium (Ga), zinc (Zn), and tin (Sn), where the content of indium is greater than gallium, and the tin to indium ratio is between 0.1 and 0.25, exhibiting C-axis-oriented crystallinity, high mobility, and improved carrier concentration, formed by deposition at 150°C or higher and subsequent heat treatment, to enhance reliability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If amorphous silicon is used as the active layer, then manufacturing time is short and manufacturing cost is low, but mobility is low and current-driving ability is poor
Solution Approach 1:
The patent changes the material composition parameters of the semiconductor layer by incorporating tin (Sn) at specific concentrations (0.1-5 at%) into the In-Ga-Zn-O system. This parameter modification enables the material to achieve high mobility characteristics similar to polycrystalline silicon while maintaining the low-temperature deposition capability of amorphous materials, thus resolving the contradiction between manufacturing efficiency and device performance
Solution Approach 2:
The patent creates a composite oxide semiconductor material system (In-Ga-Zn-Sn-O) that combines multiple metallic elements with specific atomic ratios. This composite structure leverages the beneficial properties of each element: indium for high mobility, gallium for stability, zinc for non-toxicity and bandgap control, and tin for enhanced carrier transport. The composite material achieves both high performance and manufacturability
2Reliability
If polycrystalline silicon is used as the active layer, then mobility is high, but the number of processes is increased and manufacturing cost is increased
Solution Approach 1:
The patent modifies the deposition parameters to achieve amorphous phase formation at low temperatures (room temperature to 150°C) while incorporating tin elements that promote high mobility. This eliminates the need for high-temperature crystallization processes required by polycrystalline silicon, reducing process complexity while maintaining high mobility through compositional engineering rather than structural transformation
Solution Approach 2:
The patent adopts a simpler, more direct deposition process that forms the active layer in a single step without requiring subsequent crystallization treatments. This single-step amorphous deposition approach, enabled by the In-Ga-Zn-Sn-O composition, replaces the multi-step polycrystalline fabrication process, reducing manufacturing complexity and cost while achieving comparable or superior performance
3Reliability
If oxide semiconductor is used as the active layer, then mobility is high and transparency is achieved, but oxygen content control is critical and defect density is high
Solution Approach 1:
The patent introduces tin as a compositional parameter that stabilizes the oxide semiconductor structure. The Sn atoms act as structural modifiers that reduce oxygen vacancy formation and improve oxygen content uniformity across the film. By controlling Sn concentration within 0.1-5 at%, the material achieves both high mobility and improved manufacturing precision regarding oxygen stoichiometry
Solution Approach 2:
The In-Ga-Zn-Sn-O composite system provides synergistic effects where tin works together with indium, gallium, and zinc to create a more stable oxide network. This composite structure reduces defect density by suppressing oxygen vacancies and improving overall compositional uniformity, making the material more tolerant to variations in deposition conditions while maintaining high mobility
4Reliability
If deposition temperature is increased to 150°C or higher, then mobility and crystallinity are improved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent optimizes the deposition temperature parameter within a specific range (room temperature to 150°C) combined with controlled post-deposition heat treatment. This temperature parameter optimization, together with the In-Ga-Zn-Sn-O composition, enables the formation of amorphous films with high mobility without requiring excessive heating, balancing performance improvement with manufacturing ease
Solution Approach 2:
The patent incorporates tin elements during the initial deposition process to pre-establish the high-mobility compositional structure. This preliminary incorporation of Sn during deposition, rather than requiring subsequent high-temperature processing to achieve mobility enhancement, allows the material to develop desirable properties at lower temperatures, simplifying the overall manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution achieves excellent mobility, reliability, and stability, enabling the thin-film transistor to withstand heat and light, thus suitable for large-area and high-resolution displays with improved uniformity and reduced defect density.
Implementation Method 1
formed by deposition at 150°C or higher and subsequent heat treatment
Implementation Method 2
formed by deposition at 150°C or higher and subsequent heat treatment
Data Source
AI summary
A thin-film transistor is disclosed. The thin-film transistor includes a gate electrode disposed on a substrate, an oxide semiconductor layer disposed so as to overlap at least a portion of the gate electrode in the state of being isolated from the gate electrode, a gate insulation film disposed between the gate electrode and the oxide semiconductor layer, a source electrode connected to the oxide semiconductor layer, and a drain electrode connected to the oxide semiconductor layer in the state of being spaced apart from the source electrode, wherein the oxide semiconductor layer includes indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O), the content of indium (In) in the oxide semiconductor layer is greater than the content of gallium (Ga), the content of indium (In) is substantially equal to the content of zinc (Zn), and the content ratio (Sn/In) of tin (Sn) to indium (In) is 0.1 to 0.25.