Oxide TFT Array Substrate Layout Without Contact Holes

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Solution Overview

Problem

Conventional array substrates for oxide TFTs require complex manufacturing processes due to the need for double-gate or double active layer structures to enhance mobility, which results in limited improvement and poor device uniformity.

Innovation Solution

An array substrate design where the first and second active layers are connected in parallel, with the source-drain layer and first active layer on the same surface, eliminating the need for contact holes and insulating layers, and utilizing different doped portions with varying ion concentrations to balance conductivity rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If double-gate or double active layer structures are employed to enhance mobility, then the mobility of oxide TFTs is improved, but the manufacturing process complexity increases

Engineering Contradiction:
ImprovemobilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The active layer is segmented into a first active layer and a second active layer, each with distinct functions. The first active layer forms a first channel portion that directly contacts the source-drain layer, while the second active layer forms a second channel portion controlled by the second gate. This segmentation allows the first active layer to provide direct contact (simplifying manufacturing) while the second active layer enhances mobility through dual-gate control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a conventional planar structure to a multi-layer stacked structure where the first and second active layers are arranged in different spatial dimensions. The first active layer is positioned to directly contact the source-drain layer on the same surface, while the second active layer is stacked above it, controlled by the second gate. This dimensional arrangement enables both direct contact and enhanced mobility without increasing manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If double active layer structure with via holes is used to connect source-drain electrodes and active layers, then mobility is enhanced, but the manufacturing process becomes more complex

Engineering Contradiction:
ImprovemobilityVSAvoidmanufacturing process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention extracts and eliminates the via hole connection structure from the conventional double active layer design. Instead of using via holes to connect the source-drain electrodes to the active layers, the first active layer is directly formed to contact the source-drain layer on the same surface. This extraction removes the complex via hole formation steps while preserving the mobility-enhancing benefits of the dual active layer structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of the conventional approach where via holes are used to connect lower and upper active layers, the invention inverts the connection method by having the first active layer directly contact the source-drain layer without intermediate via holes. The connection is established through direct lateral contact on the same surface, fundamentally changing the connection topology from vertical via-hole-based to lateral direct-contact-based.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If first doped portions with high ion concentration are used to contact source-drain layer, then electrical contact is improved, but conductivity balance between active layers becomes challenging

Engineering Contradiction:
Improveelectrical contact qualityVSAvoidconductivity balance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention applies different doping concentrations to different regions of the active layers. The first doped portions of the first active layer have high ion concentration to ensure excellent electrical contact with the source-drain layer. The second doped portions of the second active layer have lower ion concentration to maintain appropriate conductivity and balance. This local quality differentiation allows each region to be optimized for its specific function.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes the doping concentration parameter across different regions and layers. The first doped portions use high ion concentration (first doping concentration) for optimal contact with the source-drain layer, while the second doped portions use lower ion concentration (second doping concentration) to balance the conductivity of the second active layer. This parameter variation enables simultaneous optimization of contact quality and conductivity balance.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Simplifies the manufacturing process by eliminating the need for contact holes and insulating layers, while ensuring balanced conductivity rates between active layers for improved device uniformity and performance.

Implementation Method 1

utilizing different doped portions with varying ion concentrations to balance conductivity rates

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20250098303A1Array substrate, manufacturing method thereof, and display panel
Publication Date: 2025.03.20 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US20250098303A1 patent drawing
  • US20250098303A1 patent drawing
  • US20250098303A1 patent drawing

AI summary

An array substrate, its manufacturing method, and a display panel are provided. The array substrate includes a substrate, a first active layer, a source-drain layer, a first gate, a second active layer, and a second gate. The first active layer includes a first channel portion corresponding to the first gate. The second active layer includes a second channel portion corresponding to the second gate. The first active layer and the second active layer are connected in parallel. The source-drain layer and the first channel portion are arranged on the surface of a same layer, so an insulating layer between the source-drain layer and the first active layer is omitted. Additionally, the first active layer directly contacts a source contact portion and a drain contact portion of the source-drain layer, so contact holes between the first active layer and the source-drain layer are omitted, simplifying fabrication of the array substrate.