Oxide TFT Array Panel Copper Alloy Capping Layer
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Solution Overview
Problem
The challenge in manufacturing larger display devices is to reduce signal line resistance while maintaining the characteristics of thin film transistors, as existing methods like double-layered copper and titanium signal lines can deteriorate the transistor characteristics due to foreign substance defects at the interface.
Innovation Solution
A thin film transistor array panel is designed with a copper alloy capping layer and a barrier layer made from alloys like vanadium, zirconium, or manganese, which improves the contact between the oxide semiconductor and signal lines, reducing resistance and simplifying the manufacturing process by batch-etching multi-layered signal lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a double-layered signal line made of copper and titanium is used to reduce resistance, then resistance in signal lines is reduced, but foreign substance defects are generated at the interface between titanium and oxide semiconductor, deteriorating thin film transistor characteristics
Solution Approach 1:
A barrier layer made of molybdenum, tungsten, or their alloys is introduced as an intermediary between the copper signal line and the oxide semiconductor layer. This barrier layer prevents direct contact and potential contamination between the copper/titanium layers and the oxide semiconductor, eliminating foreign substance defects while maintaining low resistance through the copper layer.
Solution Approach 2:
The signal line structure uses composite materials: a copper-based main wiring layer for low resistance, a copper alloy capping layer for protection and oxidation prevention, and a molybdenum/tungsten barrier layer for contamination prevention. This multi-material composite approach resolves the contradiction by assigning different functions to different materials in the stack.
2Speed
If the display area is enlarged, then high-speed driving is required, but resistance in signal lines increases, requiring additional measures to reduce resistance
Solution Approach 1:
The invention changes the material composition parameters of the signal line by using copper (high conductivity) as the main wiring layer and optimizing the alloy composition of the capping layer. This parameter optimization reduces signal line resistance, enabling high-speed driving in enlarged displays without compromising reliability.
3Object-affected harmful factors
If a copper alloy capping layer is used instead of titanium, then foreign substance defects are reduced, but manufacturing complexity may increase due to additional layers
Solution Approach 1:
The copper alloy capping layer serves multiple functions simultaneously: it protects the copper main wiring layer from oxidation, provides a etch-stop layer during manufacturing, and eliminates the need for separate titanium layers. This multi-functionality reduces the overall structure complexity while preventing foreign substance defects.
Solution Approach 2:
The invention merges the protective function and the contamination-prevention function into a single copper alloy capping layer, eliminating the need for separate titanium layers. This consolidation reduces structural complexity while maintaining the benefits of defect prevention.
Data Source
AI summary
A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.