Oxide Semiconductor TFT Dual-Layer Passivation for Leakage Prevention

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Solution Overview

Problem

Thin film transistors using silicon-based semiconductors face limitations in charge mobility and manufacturing complexity, and existing solutions like oxide semiconductors require improved passivation to prevent current leakage and moisture exposure.

Innovation Solution

A thin film transistor array panel with an oxide semiconductor layer and a dual-layer passivation system using the same metal oxide but with varying metal amounts, where the first passivation layer is completely oxidized and thin, and the second layer is thicker with aluminum oxide, preventing moisture and air infiltration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single passivation layer is used, then the manufacturing process is simple, but current leakage occurs due to insufficient oxidization and the layer cannot prevent moisture infiltration

Engineering Contradiction:
Improveprevention of current leakage and moisture infiltrationVSAvoidpassivation layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The passivation layer is divided into two distinct layers: a first passivation layer in direct contact with the oxide semiconductor layer that is completely oxidized to prevent current leakage, and a second passivation layer on top that is thicker to prevent moisture and air infiltration. This segmentation allows each layer to specialize in different protective functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the passivation structure have different properties: the first passivation layer has complete oxidation and specific thickness to prevent current leakage at the interface with the semiconductor, while the second passivation layer has greater thickness to provide moisture barrier protection. Each layer is optimized for its specific protective role.

Inventive Principle:
Principle #3Local quality

2Reliability

If polycrystalline silicon is used for high charge mobility, then charge mobility is improved, but manufacturing cost increases and the process becomes complicated due to required crystallization

Engineering Contradiction:
Improvecharge mobilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the semiconductor material parameter from silicon-based (amorphous or polycrystalline) to oxide semiconductor material. This material substitution provides high charge mobility inherent to the oxide semiconductor properties while avoiding the complex crystallization processes required for polycrystalline silicon, thereby maintaining performance while simplifying manufacturing.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the reliability and stability of thin film transistors by completely oxidizing the passivation layers, preventing current leakage and improving electrical characteristics.

Implementation Method 1

a first passivation layer that is disposed on the gate electrode, the source region, and the drain region, a second passivation layer that is disposed on the first passivation layer... the first passivation layer and the second passivation layer include the same metal oxide

Methodology Applied
Scientific EffectOxidization: Oxidation

Data Source

PatentUS10804404B2Thin film transistor array panel and manufacturing method thereof
Publication Date: 2020.10.13 SAMSUNG DISPLAY CO LTD
  • US10804404B2 patent drawing
  • US10804404B2 patent drawing
  • US10804404B2 patent drawing

AI summary

A thin film transistor array panel includes an oxide semiconductor layer disposed on a substrate and includes a source region, a drain region, and a channel region, a gate insulating layer and a gate electrode disposed on the oxide semiconductor layer, source region, and a drain region, a first passivation layer disposed on the gate electrode, a second passivation layer disposed on the first passivation layer, and a source electrode and a drain electrode disposed on the second passivation, and the source electrode is connected with the source region, the drain electrode is connected with the drain region, the first passivation layer and the second passivation layer include the same metal oxide, and an amount of metal included in the first passivation layer is different from an amount of metal included in the second passivation layer.