Bottom-Gate Oxide TFT Electrode Tapering for Field Relaxation
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Solution Overview
Problem
Existing thin film transistors using oxide semiconductors face challenges with electric-field concentration between source and drain electrodes, leading to deterioration of switching characteristics and poor coverage of the oxide semiconductor layer.
Innovation Solution
A bottom-gate thin film transistor is designed with an oxide semiconductor layer over source and drain electrodes, where the angles of the side surfaces of the electrodes are set to be greater than or equal to 20° and less than 90°, creating tapered shapes to increase the distance of the electric-field relaxation regions and improve coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a bottom-gate thin film transistor is used with oxide semiconductor layer, then field effect mobility is improved, but electric-field concentration occurs between source and drain electrodes causing deterioration of switching characteristics
Solution Approach 1:
The patent changes the geometric parameters of the source and drain electrodes by forming tapered side surfaces with specific angles (20° to 90° relative to the substrate surface). This parameter modification increases the distance between opposing electrode surfaces, thereby reducing electric-field concentration and preventing deterioration of switching characteristics while maintaining high field effect mobility achieved through oxide semiconductor material
Solution Approach 2:
The patent addresses the electric-field concentration problem by transitioning from a simple planar electrode configuration to a three-dimensional tapered structure. By controlling the side surface angles in the vertical dimension, the patent creates additional spatial separation between electrodes, effectively reducing field concentration in the critical gap region between source and drain
2Reliability
If oxide semiconductor layer is formed over source and drain electrodes, then switching characteristics improve, but coverage by the oxide semiconductor layer is poor
Solution Approach 1:
The patent modifies the geometric parameters of the source and drain electrodes by creating tapered side surfaces with angles between 20° and 90° relative to the substrate surface. This parameter change increases the surface area and accessibility of the electrode regions, enabling the oxide semiconductor layer to achieve complete and uniform coverage while maintaining the switching characteristics benefits
Data Source
AI summary
A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.