Oxide TFT Etch Stop Structure for Channel Damage Control
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Solution Overview
Problem
As integrated circuits scale down, forming thin film transistors (TFTs) with oxide semiconductor channel regions becomes challenging due to the need for aggressive etch processes that can damage the channel layer, leading to issues like gate leakage and bias temperature instability.
Innovation Solution
Incorporating an etch stop layer that is selectively etched relative to the dielectric material, allowing for two distinct etch processes: a harsher process to penetrate the dielectric and a gentler process to land on the channel layer without damaging it, using different etch chemistries to prevent channel layer damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an aggressive etch process is used to form recesses through the dielectric material, then the recesses can be formed effectively, but the channel layer gets damaged leading to gate leakage and bias temperature instability
Solution Approach 1:
An etch stop layer is introduced between the dielectric material and the oxide semiconductor channel layer. This intermediary layer allows the etch process to penetrate the dielectric effectively while stopping before damaging the channel layer, thus resolving the contradiction between etching efficiency and channel layer protection
Solution Approach 2:
The structure is segmented into distinct layers with different etch resistances: the dielectric material layer, the etch stop layer, and the oxide semiconductor channel layer. This segmentation enables selective etching where the aggressive etch process can remove the dielectric material while the etch stop layer protects the underlying channel layer from damage
2Length of moving object
If the thin film thickness is reduced for scaling, then device size decreases, but the channel layer becomes more susceptible to damage from etch processes
Solution Approach 1:
The etch stop layer is deposited beforehand on the oxide semiconductor channel layer before the dielectric material is formed. This protective layer acts as a cushion during subsequent etch processes, preventing direct contact between the aggressive etch chemistry and the thin channel layer, thus protecting it from damage even as thickness is reduced for scaling
3Device complexity
If a single etch process is used, then the process is simpler, but it cannot selectively remove dielectric material without damaging the channel layer
Solution Approach 1:
The etch stop layer provides locally different etching characteristics: it is etch-resistant to the aggressive etch chemistry used to remove the dielectric material, yet it can be selectively removed by a subsequent gentler etch process. This local quality difference enables precise control over which layers are removed and which are protected, achieving high manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates the formation of recesses for source and drain terminals without damaging the channel layer, improving the reliability and performance of TFTs by reducing stoichiometric changes and gate leakage.
Implementation Method 1
an etch stop layer that is selectively etched relative to the dielectric material, allowing for two distinct etch processes: a harsher process to penetrate the dielectric and a gentler process to land on the channel layer without damaging it
Data Source
AI summary
An integrated circuit structure includes a first layer comprising a semiconductor material. In an example, the semiconductor material of the layer comprises an oxide semiconductor material (e.g., comprising a metal and oxygen). The integrated circuit structure further includes a second layer above the first layer, where the second layer includes a metal and one of oxygen or nitrogen (e.g., includes aluminum and oxygen). In an example, the second layer is an etch stop layer. In an example, the second layer has a thickness of at most 20 nanometers. The integrated circuit structure further includes a first source or drain terminal and a second source or drain terminal, where each of the first and second source or drain terminals extends through the second layer and is coupled to the first layer. In an example, the integrated circuit structure is a thin film transistor (TFT), where the first layer is a thin film channel structure of the TFT.