Oxide TFT Etch Stop Layer via Oxidation Treatment
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Solution Overview
Problem
The use of oxide semiconductor material in thin film transistors (TFTs) is compromised due to etching damage from metal source and drain electrodes, leading to performance deterioration, and the additional mask process required for etch stop layers increases costs and complexity.
Innovation Solution
The etch stop layer is formed through an oxidation treatment, allowing it to be integrated into the same mask process as the oxide semiconductor active layer and source/drain electrodes, eliminating the need for an additional mask process and enhancing the barrier properties of the TFT.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor material is used as active layer and metal material is used as source and drain electrodes, then high carrier mobility and good compatibility with conventional TFT-LCD manufacturing apparatuses are achieved, but oxide semiconductor material in channel region is damaged due to etching damage
Solution Approach 1:
An etch stop layer is introduced as an intermediary layer between the oxide semiconductor active layer and the metal source/drain electrodes. This etch stop layer serves as a protective barrier that prevents etching damage from the metal electrode fabrication process while allowing the etching process to proceed effectively. The etch stop layer is specifically designed to be resistant to the etching chemicals used for metal pattern formation, thereby protecting the underlying oxide semiconductor material from damage.
2Reliability
If an etch stop layer is provided on the semiconductor active layer to secure TFT performance, then TFT stability is improved, but an additional mask process is added to the conventional process
Solution Approach 1:
The formation of the etch stop layer is merged with the existing mask process used for forming the oxide semiconductor active layer and source/drain electrodes. By integrating the etch stop layer formation into the same mask process, the patent eliminates the need for an additional separate mask process. This is achieved by carefully designing the mask pattern and etching conditions so that the etch stop layer is formed simultaneously with other structural layers, thereby reducing process complexity while maintaining TFT stability.
3Reliability
If an additional mask process is added to form etch stop layer, then TFT performance is secured, but manufacturing cost increases and product quality may be difficult to secure
Solution Approach 1:
The etch stop layer formation is combined with the existing mask process for forming the oxide semiconductor active layer and source/drain electrodes. This integration eliminates the need for an additional mask process, thereby reducing manufacturing costs and simplifying the production workflow. The merged process maintains TFT performance by ensuring proper etch stop layer formation while avoiding the increased complexity and cost associated with separate processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, improves TFT stability, and prevents diffusion-related abnormalities, thereby enhancing the performance and yield of TFTs in mass production.
Implementation Method 1
forming an oxide semiconductor active layer, an etch stop layer and a source/drain electrode on the gate insulating layer, wherein the etch stop layer is obtained by an oxidation treatment
Data Source
AI summary
According to embodiments of the invention, a thin film transistor (TFT), a manufacturing method of the TFT, an array substrate and a display device are provided. The manufacturing method of the TFT comprises: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate formed with the gate electrode; forming an oxide semiconductor active layer, an etch stop layer and a source/drain electrode on the gate insulating layer, wherein the etch stop layer is obtained by an oxidation treatment.