Oxide TFT Gate Biasing in Display CMOS Circuits
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Solution Overview
Problem
In organic EL display devices with a hybrid structure, N-channel TFTs using oxide semiconductors experience deterioration due to drain current flow from high source-drain voltage, leading to poor off-state characteristics.
Innovation Solution
A display device design incorporating a complementary metal oxide semiconductor circuit with a polysilicon P-channel TFT and an oxide semiconductor N-channel TFT, where a negative voltage is applied to the N-channel TFT's gate electrode during the off period to prevent hot carrier accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a high voltage is applied between source and drain electrodes of the N-channel TFT, then the drive capability is improved, but drain current flows due to hot carrier generation causing deterioration of TFT characteristics
Solution Approach 1:
The patent applies preliminary anti-action by introducing a protection circuit that detects high drain current conditions (caused by hot carrier generation) and preemptively reduces the gate voltage before significant deterioration occurs. This counteracts the harmful effect of high voltage operation before it can cause permanent damage to the TFT characteristics.
Solution Approach 2:
The patent implements feedback by using a detection circuit to monitor the drain current and feed this information back to a control circuit. The control circuit adjusts the gate voltage based on the detected drain current level, creating a closed-loop system that prevents excessive hot carrier generation while maintaining drive capability.
2Adaptability or versatility
If the N-channel TFT is used in a CMOS circuit for driving, then the circuit functionality is achieved, but the off-state characteristics deteriorate due to hot carrier effects
Solution Approach 1:
The patent introduces an intermediary protection circuit between the N-channel TFT and the high voltage supply. This protection circuit acts as a mediator that allows the TFT to operate in the CMOS circuit for achieving circuit functionality while preventing direct exposure to harmful high voltage conditions that would deteriorate off-state characteristics.
3Loss of energy
If oxide semiconductor is used for the N-channel TFT, then leakage current is reduced, but hot carrier generation causes deterioration when voltage is high
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the gate voltage parameter based on the operating conditions. When hot carrier generation is detected, the gate voltage is reduced to a safer level, preventing deterioration while maintaining the low leakage current advantage of oxide semiconductor materials under normal operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the deterioration of N-channel TFT characteristics by preventing drain current flow during the off state, maintaining device performance.
Implementation Method 1
even when the N-channel TFT using the oxide semiconductor is in an off state, if the voltage between a source electrode and a drain electrode is high, a drain current flows due to generation of hot carriers
Data Source
AI summary
In a CMOS circuit provided as part of a drive circuit in a frame region, a second TFT including a second semiconductor layer formed of an oxide semiconductor includes a first gate electrode provided on one surface side of the second semiconductor layer with a first inorganic insulating film interposed therebetween, and a second gate electrode provided on the other surface side of the second semiconductor layer with a second inorganic insulating film interposed therebetween. The second TFT is configured to apply a negative voltage to the second gate electrode during an off period in which no voltage is applied to the first gate electrode.


