Oxide Thin-Film Transistor Gate Insulator Structure Against Bulging
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Solution Overview
Problem
Oxide semiconductor thin film transistors face issues with gate insulation layer bulging due to poor adhesion between metal electrodes and insulation layers, leading to short circuits and reduced yield in production.
Innovation Solution
The structure of the gate insulation layer is modified by stacking silicon oxide and silicon nitride layers, with controlled Si-H bond content in the silicon nitride layer to enhance adhesion, using a single-layer or multi-layer silicon nitride structure to manage stress differences and prevent bulging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If silicon nitride layer is used as gate insulation layer, then adhesion between metal electrode and insulation layer is improved, but gate insulation layer bulging occurs due to stress accumulation
Solution Approach 1:
The gate insulation layer is segmented into multiple sublayers: a first silicon nitride sublayer (high adhesion, stress compensation), a silicon oxide sublayer (stress buffer), and a second silicon nitride sublayer (adhesion enhancement). This segmentation distributes and balances internal stresses while maintaining strong adhesion throughout the structure, preventing bulging deformation.
Solution Approach 2:
The patent controls the Si-H bond content parameter in the silicon nitride layers (≤7% of total bonds) and adjusts the thickness ratios of different sublayers. By changing these chemical and dimensional parameters, the internal stress is optimized to balance adhesion strength with deformation prevention.
2Strength
If Si-H bond content in silicon nitride layer is increased, then adhesion is enhanced, but stress difference increases causing bulging
Solution Approach 1:
The patent optimizes the Si-H bond content parameter to be within 7% of total bonds (Si-N, N-H, Si-H). This parameter control ensures sufficient adhesion while limiting excessive stress accumulation that would cause bulging, achieving a balanced state.
Solution Approach 2:
The silicon oxide sublayer acts as an intermediary between the silicon nitride layers, buffering stress transmission. It mediates the stress difference caused by Si-H bonds in silicon nitride, preventing stress concentration that leads to bulging while allowing adhesion to be maintained.
3Ease of manufacture
If single-layer silicon nitride structure is used, then manufacturing process is simplified, but stress distribution is uneven leading to deformation
Solution Approach 1:
Rather than using a single thick silicon nitride layer, the structure is segmented into multiple thinner sublayers with different compositions and stress characteristics. This segmentation enables better stress distribution and deformation control while remaining manufacturable through standard deposition processes.
4Reliability
If gate insulation layer thickness is increased, then electrical insulation is improved, but internal stress accumulates causing adhesion failure
Solution Approach 1:
The thick gate insulation layer is segmented into multiple sublayers with alternating high-adhesion (silicon nitride) and stress-buffer (silicon oxide) characteristics. This segmentation maintains electrical insulation through total thickness while preventing stress accumulation that would cause adhesion failure at any single interface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the adhesion between metal electrodes and insulation layers, reducing the likelihood of bulging and enhancing production yield by maintaining stable film integrity under high-temperature processes.
Implementation Method 1
a stress difference between the gate electrode and the silicon nitride layer ranges from 400 Mpa to 950 Mpa, and the stress difference between the silicon nitride layer and the silicon oxide insulation layer ranges from 50 Mpa to 400 Mpa
Implementation Method 2
improves the adhesion between metal electrodes and insulation layers
Data Source
Figure 1~4
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AI summary
Embodiments of the present disclosure provide an oxide thin film transistor and a manufacturing method therefor, and an electronic device. The oxide thin film transistor comprises a base substrate (21), a gate (22) and a metal oxide semiconductor layer (24) that are sequentially stacked on the base substrate (21), and a gate insulating layer (23) provided between the metal oxide semiconductor layer (24) and the gate (22), wherein the gate insulating layer (23) comprises a silicon oxide insulating layer (231) and a silicon nitride layer (232) that are stacked; the silicon nitride layer (232) is of a single-layer structure or comprises a plurality of silicon nitride sub layers that are sequentially stacked; the silicon oxide insulating layer (231) is provided between the silicon nitride layer (232) and the metal oxide semiconductor layer (24); and at least part of the region of the silicon nitride layer (232) satisfies that: an Si-H bond occupies an Si-N bond, and the percentage content of the sum of an N-H bond and the Si-H bond is not greater than 7%. The thin film transistor can solve the problem of bulging of the gate insulating layer by adjusting the structure of the gate insulating layer.