Oxide Semiconductor TFT Gate Insulator Thickness Variation
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Solution Overview
Problem
Conventional methods for manufacturing thin-film transistors (TFTs) using silicon-based materials face limitations such as low mobility, non-uniform threshold voltage, and high production costs, especially for large-sized substrates, due to the use of expensive laser heat treatment and the need for additional compensation circuits.
Innovation Solution
A method involving the formation of an oxide semiconductor pattern on a substrate, with a gate insulating film having varying thickness regions, where plasma processing using a hydrogen-containing gas makes the second oxide semiconductor region conductive, allowing for the creation of a TFT with improved mobility and reduced manufacturing costs by eliminating the need for additional annealing and ion doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon is used as the active layer material, then the manufacturing cost is reduced, but the mobility of the TFT becomes low and high-speed operation is not achieved
Solution Approach 1:
The patent changes the material parameter from conventional silicon-based materials to oxide semiconductor materials (such as IGZO - indium gallium zinc oxide). This material substitution enables high mobility comparable to poly-silicon while maintaining compatibility with low-temperature manufacturing processes, thus achieving both low cost and high speed performance without requiring expensive laser annealing equipment.
2Speed
If poly-silicon is used as the active layer material, then the mobility of the TFT is high, but the threshold voltage becomes non-uniform and additional compensation circuits are required
Solution Approach 1:
By switching to oxide semiconductor materials, the patent achieves uniform threshold voltage characteristics inherent to the material properties. This eliminates the need for additional compensation circuits while maintaining high mobility, thus reducing device complexity without sacrificing performance.
3Ease of manufacture
If the gate insulating film has uniform thickness, then the manufacturing process is simple, but current leakage occurs and structural integrity is compromised
Solution Approach 1:
The patent implements a gate insulating film with non-uniform thickness: a first thickness in the channel region and a second thickness (greater than the first) in the source/drain regions. This local variation prevents current leakage by providing better insulation where needed while maintaining manufacturing feasibility through selective etching processes that create the thickness differential.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a TFT with higher mobility, reduced production costs, and the ability to manufacture large-sized substrates without the need for expensive laser heat treatment, while preventing current leakage and enhancing the structural integrity of the TFT.
Implementation Method 1
performing plasma processing on the gate insulating film where a second oxide semiconductor region of the oxide semiconductor pattern under the second insulating region becomes conductive. The plasma processing uses a hydrogen-containing gas.
Implementation Method 2
The plasma processing uses a hydrogen-containing gas
Data Source
AI summary
A method of manufacturing a thin-film transistor includes forming an oxide semiconductor on a substrate, stacking an insulating layer and a metal layer on the substrate to cover the oxide semiconductor, forming a photosensitive pattern on the metal layer, forming a gate electrode by etching the metal layer using the photosensitive pattern as a mask, where a part of the gate electrode overlaps a first oxide semiconductor region of the oxide semiconductor, forming a gate insulating film by partially etching the insulating layer using the photosensitive pattern as a mask, where the gate insulating film includes a first insulating region with a first thickness under the photosensitive pattern and a second insulating region with a second thickness less than the first thickness, and performing plasma processing on the gate insulating film so that a second oxide semiconductor region of the oxide semiconductor under the second insulating region becomes conductive.