Oxide TFT Interlayer Stack With Graded Hydrogen Concentration
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Solution Overview
Problem
Existing display devices face challenges in achieving improved device characteristics for thin film transistors, particularly due to variations in crystal direction, size, and defects of the polycrystalline silicon film, which affect the performance of thin film transistors in display devices.
Innovation Solution
A display device structure is developed with an oxide semiconductor layer, a gate insulating layer, and a multi-layer interlayer insulating structure comprising silicon oxide and silicon nitride layers, where the hydrogen concentration in the interlayer insulating layers is controlled to minimize hydrogen diffusion and improve transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-layer interlayer insulating structure is used, then the manufacturing process is simple, but hydrogen diffusion occurs causing degraded transistor characteristics
Solution Approach 1:
The interlayer insulating layer is divided into multiple sub-layers (first, second, and third upper interlayer insulating layers) with different materials and hydrogen concentrations. This segmentation prevents hydrogen diffusion while maintaining manufacturing feasibility through a structured approach.
Solution Approach 2:
The patent uses a composite interlayer insulating structure combining silicon oxide and silicon nitride materials in specific layers. This composite structure creates a hydrogen barrier while maintaining electrical insulation properties, resolving the contradiction between reliability and structural complexity.
2Reliability
If high hydrogen concentration is present in interlayer insulating layers, then the manufacturing process is easier, but hydrogen ion diffusion degrades transistor performance
Solution Approach 1:
Different regions of the interlayer insulating structure have different hydrogen concentrations tailored to their specific functions. The first upper layer has low hydrogen concentration for hydrogen barrier function, while other layers have higher concentrations for ease of manufacture, achieving local optimization.
Solution Approach 2:
The patent changes the hydrogen concentration parameter across different layers of the interlayer insulating structure. By controlling hydrogen concentration to be less than 1×10^21 atoms/cm³ in the first upper layer, the patent prevents hydrogen diffusion while maintaining manufacturing feasibility in other layers.
3Manufacturing precision
If polycrystalline silicon film with varying crystal properties is used, then the manufacturing process is simpler, but device characteristics vary due to crystal direction, size, and defects
Solution Approach 1:
The gate insulating layer acts as an intermediary between the polycrystalline silicon film and the gate electrode, providing a controlled interface that reduces the impact of crystal variations on device characteristics.
Solution Approach 2:
The patent changes the material parameter from polycrystalline silicon to oxide semiconductor, fundamentally altering the film structure to eliminate crystal direction, size, and defect variations that cause device characteristic inconsistencies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The controlled hydrogen concentration in the interlayer insulating layers enhances the device characteristics of thin film transistors, reducing hydrogen ion diffusion and improving the threshold voltage and mobility of the transistors, thereby enhancing the overall performance of the display device.
Implementation Method 1
a first upper interlayer insulating layer disposed on the first upper gate electrode, a second upper interlayer insulating layer disposed on the first upper interlayer insulating layer, and a third upper interlayer insulating layer disposed on the second upper interlayer insulating layer... the first upper interlayer insulating layer includes silicon oxide, each of the second upper interlayer insulating layer and the third upper interlayer insulating layer includes silicon nitride
Data Source
AI summary
A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.