Oxide Semiconductor TFT Layout for Mask Alignment Tolerance
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Solution Overview
Problem
The existing technologies face challenges in maintaining consistent TFT characteristics due to limitations in mask alignment accuracy, leading to variations in oxide semiconductor conductivity and increased leak current in display devices using oxide semiconductors.
Innovation Solution
The solution involves forming oxide semiconductors in an island shape with a wider channel width than the gate electrode, ensuring that the uncovered areas between the gate and source/drain electrodes have high resistivity by oxidizing these areas to minimize the impact of mask alignment variations, thereby stabilizing TFT characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mask alignment accuracy is improved, then TFT characteristic variation is reduced, but manufacturing complexity and cost increase
Solution Approach 1:
The oxide semiconductor layer is designed with different widths in different regions: a wider channel width under the gate electrode for stable TFT characteristics, and narrower extensions in other areas. This local differentiation allows the invention to achieve tolerance to mask alignment errors without requiring high precision across the entire structure, thereby resolving the contradiction between manufacturing precision and device complexity
2Reliability
If oxide semiconductor width is increased to compensate for alignment variation, then TFT characteristic stability improves, but leak current increases
Solution Approach 1:
The oxide semiconductor layer has a wider width specifically in the channel region under the gate electrode where stability is needed, while the source and drain extension regions have narrower widths. This localized width control allows the channel to be tolerant to alignment variations without excessively increasing the overall oxide semiconductor area that would generate leak current, thus resolving the contradiction between reliability and harmful factors
Solution Approach 2:
The oxide semiconductor layer is segmented into different functional regions with different widths: the channel region under the gate has a wider width for stability, while the source and drain regions have narrower widths to minimize leak current. This segmentation allows each region to be optimized for its specific function, resolving the contradiction between characteristic stability and leak current reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses variations in TFT characteristics and reduces leak current, enhancing the reliability and performance of display devices by ensuring high resistivity in uncovered areas, thus maintaining consistent device functionality despite mask alignment inaccuracies.
Implementation Method 1
oxidizing a portion of the oxide semiconductor that is not covered by the gate electrode
Data Source
AI summary
The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.