Oxide TFT Interface Engineering for Stable PBTS Under Thermal Processing

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Solution Overview

Problem

Metal oxide thin-film transistors in electronic devices face poor positive-bias-temperature stress (PBTS) performance due to multiple heating and annealing processes during manufacturing, affecting the reliability of these devices.

Innovation Solution

An electronic device structure is developed with a substrate, buffer layer, oxide semiconductor layer, and specific insulating layers, where the intensity of SiN- at certain interfaces is optimized using TOF-SIMS analysis to enhance the stability of the PBTS performance, including N2 plasma treatment and layered structures to improve conductivity and reduce defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple heating and annealing processes are applied to metal oxide thin-film transistors during manufacturing, then the transistor structure is formed, but the positive-bias-temperature stress (PBTS) performance deteriorates

Engineering Contradiction:
ImprovePBTS performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by performing N2 plasma treatment on the oxide semiconductor layer surface before subsequent manufacturing steps. This pre-treatment passivates surface states and reduces defects that would otherwise deteriorate during heating and annealing processes, thereby maintaining PBTS performance throughout the manufacturing sequence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the chemical state of the oxide semiconductor layer by introducing SiN- species through plasma treatment. This parameter change modifies the surface chemistry to reduce oxygen vacancies and improve interface quality, which stabilizes the transistor against PBTS degradation during subsequent thermal processing.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If N2 plasma treatment is applied to the oxide semiconductor layer surface, then the PBTS performance stability is improved, but the manufacturing process complexity increases

Engineering Contradiction:
ImprovePBTS performance stabilityVSAvoidmanufacturing process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the N2 plasma treatment step with the existing manufacturing process sequence by integrating it between the oxide semiconductor layer formation and the gate electrode fabrication. This consolidation approach incorporates the reliability-improving treatment without requiring separate dedicated process equipment or additional process modules.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the intensity of SiN- at the interface between the oxide semiconductor layer and insulating layer is increased, then the PBTS performance is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
ImprovePBTS performanceVSAvoidinterface SiN- intensity control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent uses N2 plasma as an intermediary treatment to introduce SiN- species at the oxide semiconductor layer interface. This intermediary process achieves controlled modification of the interface chemistry without requiring direct deposition or complex in-situ control mechanisms, thereby improving PBTS performance while maintaining manageable manufacturing precision requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly improves the stability and reliability of the PBTS performance of thin-film transistors, enhancing the overall performance and reliability of electronic devices by optimizing SiN- bonding and conductivity.

Implementation Method 1

performing an N2 plasma treatment on a surface of the oxide semiconductor layer

Methodology Applied
Scientific EffectPlasma treatment: Plasma

Data Source

PatentUS20250107236A1Electronic device and method of manufacturing the same
Publication Date: 2025.03.27 INNOLUX CORP
  • US20250107236A1 patent drawing
  • US20250107236A1 patent drawing
  • US20250107236A1 patent drawing

AI summary

An electronic device is provided. The electronic device includes a substrate, a buffer layer, an oxide semiconductor layer, a first insulating layer, and a gate electrode. The buffer layer is disposed on the substrate. The oxide semiconductor layer is disposed on the buffer layer and has a first part and a second part adjacent to the first part. The first insulating layer is disposed on the oxide semiconductor layer. The gate electrode is disposed on the first insulating layer and overlapped with the first part of the oxide semiconductor layer. Moreover, an intensity of SiN— at an interface between the first part and the first insulating layer is greater than an intensity of SiN— at an interface between the first part and the buffer layer in a spectrum measured by TOF-SIMS. A method of manufacturing an electronic device is also provided.