Oxide TFT Protecting Layer Structure to Prevent Double-Channel Effects
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Solution Overview
Problem
High-mobility oxide semiconductor transistors face stability issues due to the formation of undercuts during etching, leading to double-channel effects and poor performance in display applications, as higher carrier mobility results in poorer stability and difficulty in control.
Innovation Solution
A metal-oxide thin-film transistor structure is developed with a protecting layer having a lower carrier mobility than the active layer, both made of the same metal-oxide-semiconductor material, which covers the active layer's main and side surfaces, and includes a grid and insulating layers to prevent undercut formation and improve stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-mobility oxide semiconductor materials are used in thin-film transistors, then carrier mobility and response speed are improved, but stability deteriorates due to undercut formation during etching
Solution Approach 1:
The semiconductor layer is segmented into multiple layers with different carrier mobilities. The first semiconductor layer provides high carrier mobility for fast response, while the second semiconductor layer provides stability and suppresses undercut formation during etching. This segmentation allows each layer to perform its specialized function.
Solution Approach 2:
Different regions of the semiconductor structure are assigned different materials and properties. The first semiconductor layer uses high-mobility oxide material for the channel region, while the second semiconductor layer uses oxide material with different characteristics for the region requiring stability and undercut suppression, creating local quality differentiation.
2Reliability
If multiple layers of metal-oxide semiconductor material are used to improve stability, then reliability is improved, but manufacturing complexity increases due to different etching requirements
Solution Approach 1:
The etching parameters are optimized to work effectively on both the first and second semiconductor layers. By adjusting etching conditions such as gas flow rates, power density, and exposure time, a single etching process can selectively remove material from both layers without requiring separate process parameters for each layer.
Solution Approach 2:
A universal etching process is developed that can handle both types of semiconductor layers with different material compositions. This multi-functional etching approach eliminates the need for separate etching processes for the first and second semiconductor layers, simplifying manufacturing.
3Device complexity
If the same etching agent is used to etch different material layers, then process simplicity is maintained, but undercut formation occurs leading to double-channel effects
Solution Approach 1:
The second semiconductor layer acts as an intermediary that suppresses undercut formation during etching. It serves as a protective barrier that prevents the etching agent from creating unwanted lateral etching in the first semiconductor layer, thereby maintaining etching precision while using the same etching process.
Solution Approach 2:
The potential harm of undercut formation is converted into a benefit by using the second semiconductor layer to deliberately control and suppress undercut. The etching process that would normally cause harmful undercuts is instead harnessed to create a precise, controlled structure where the second layer prevents lateral etching in the first layer.
Data Source
AI summary
An array base plate includes a substrate; and a driving transistor and a switching transistor that are located on the substrate; the driving transistor includes a semiconductor layer; the switching transistor includes an active layer and a protecting layer, and the active layer includes two opposite main surfaces and a side surface that is located between outer contours of the two main surfaces; the protecting layer is located on a main surface of the active layer that is away from the substrate and covers the main surface and the side surface; the protecting layer and the semiconductor layer are arranged in a same layer, and a material of the protecting layer and a material of the semiconductor layer are a same metal-oxide-semiconductor material; and a carrier mobility of the protecting layer is less than a carrier mobility of the active layer.