Oxide TFT Region Layout to Balance Display Resolution and Power
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Solution Overview
Problem
Current display apparatuses face inefficiencies due to differences in driving properties between thin film transistors in display and non-display areas, leading to suboptimal performance in resolution and power consumption.
Innovation Solution
A display apparatus is designed with a bottom gate type thin film transistor in the display area for high resolution and a top gate type thin film transistor in the non-display area, both using oxide semiconductor materials, to optimize efficiency and reduce power consumption by preventing parasitic cap formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a bottom gate type thin film transistor is used in the display area, then the area occupied by the transistor is reduced enabling high resolution, but the transistor may generate parasitic cap leading to increased power consumption
Solution Approach 1:
The patent applies different transistor structures to different functional areas: bottom gate type TFTs in the display area for high resolution, and top gate type TFTs in the non-display area for low power consumption. This local differentiation resolves the contradiction by optimizing each area for its specific requirements rather than using a uniform structure throughout.
2Loss of energy
If a top gate type thin film transistor is used in the non-display area, then power consumption is reduced by preventing parasitic cap formation, but the transistor occupies larger area reducing integration density
Solution Approach 1:
The patent strategically places top gate type TFTs only in the non-display area where power consumption is critical, while accepting the larger area requirement. This localized application resolves the contradiction by matching the transistor structure to the specific functional demands of each region.
3Ease of manufacture
If the same thin film transistor type is used in both display and non-display areas, then manufacturing is simplified, but driving efficiency is reduced due to different functional requirements
Solution Approach 1:
The patent differentiates transistor types by location: bottom gate for display pixels requiring high switching speed and small area, top gate for peripheral circuits requiring low power consumption. This resolves the contradiction by prioritizing driving efficiency through localized optimization rather than uniform manufacturing simplicity.
Solution Approach 2:
The patent segments the display apparatus into functional zones (display area vs. non-display area) and assigns different transistor structures to each zone. This segmentation allows each region to be optimized for its specific function while maintaining overall system integration.
Data Source
AI summary
A method for manufacturing a display apparatus can include providing a first gate electrode on a substrate; providing a first active layer which overlaps with a portion of the first gate electrode; providing a second active layer on the substrate spaced apart from the first active layer; providing a first source electrode and a first drain electrode connected with the first active layer; providing a second gate electrode which overlaps with at least a portion of the second active layer; providing a second source electrode and a second drain electrode connected with the second active layer. Also, the method includes selectively providing conductivity to the second active layer, in which the first source electrode, the first drain electrode, the second gate electrode, the second source electrode, and the second drain electrode are manufactured at a same time.