Oxide Thin Film Transistor Parasitic Capacitance Reduction

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Solution Overview

Problem

Thin film transistors using amorphous silicon or polysilicon face limitations in charge mobility and manufacturing complexity, while oxide semiconductors offer higher electron mobility but are prone to parasitic capacitance issues affecting their performance.

Innovation Solution

A thin film transistor design incorporating an oxide semiconductor with a low conductive region between the source and drain electrodes, an insulating layer covering the semiconductor and low conductive region, and a gate electrode positioned on the insulating layer, which reduces parasitic capacitance and improves carrier concentration gradients.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If oxide semiconductor is used in thin film transistor, then electron mobility is improved, but parasitic capacitance increases affecting performance

Engineering Contradiction:
Improveelectron mobilityVSAvoidparasitic capacitance
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The source electrode and drain electrode are divided into multiple segments (first source electrode, second source electrode, first drain electrode, second drain electrode) positioned at different locations. This segmentation reduces the overlap area between electrodes, thereby reducing parasitic capacitance while maintaining electrical connectivity through the oxide semiconductor channel.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical stacking dimension by positioning electrodes and oxide semiconductor layers at different heights (first and second positions). This three-dimensional arrangement reduces planar overlap between source and drain electrodes, effectively reducing parasitic capacitance while preserving the high electron mobility pathway through the oxide semiconductor.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If polysilicon is used for high charge mobility, then charge mobility is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvecharge mobilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from polysilicon to oxide semiconductor, which inherently provides high electron mobility without requiring complex crystallization processes. This material substitution maintains the charge mobility benefit while simplifying the manufacturing process by eliminating the need for high-temperature crystallization steps associated with polysilicon.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining oxide semiconductor with metal electrodes (such as aluminum, silver, or copper). This composite approach leverages the high electron mobility of oxide semiconductor and the excellent electrical conductivity of metals, achieving high charge mobility without the manufacturing complexity of polysilicon crystallization.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS10192992B2Display device
Publication Date: 2019.01.29 SAMSUNG DISPLAY CO LTD
  • US10192992B2 patent drawing
  • US10192992B2 patent drawing
  • US10192992B2 patent drawing

AI summary

A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.