Oxide Thin-Film Transistor Spray Coating for Uniform Large-Area Channels
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Solution Overview
Problem
Current thin film transistor manufacturing processes are complex and costly, hindering the development of high-performance transistors necessary for high-speed display technologies, particularly due to the high costs associated with sputtering methods and uniformity issues with spin coating for large-area substrates.
Innovation Solution
A thin film transistor is developed using a semiconductor layer with amorphous oxide semiconductors and nanocrystalline dots, formed by a spray coating method at temperatures between 320° C. to 390° C., incorporating indium oxide and treated with nitrous oxide plasma, which reduces defects and maintains high performance while simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sputtering method is used to form semiconductor layer, then manufacturing precision and performance are improved, but manufacturing cost increases
Solution Approach 1:
The patent changes the deposition method from sputtering to spray coating, and adjusts the substrate temperature to 320-390°C to form nanocrystalline dots in the oxide semiconductor layer. This parameter change achieves high uniformity and performance while using a lower-cost manufacturing process.
Solution Approach 2:
The patent creates a composite semiconductor layer combining amorphous oxide semiconductor with nanocrystalline dots (In, In2O3). This composite structure achieves high electron mobility and uniformity comparable to sputtering, while using a more cost-effective spray coating process.
2Ease of manufacture
If spin coating is used to form semiconductor layer, then manufacturing cost is reduced, but manufacturing precision deteriorates due to uniformity issues on large-area substrates
Solution Approach 1:
The patent introduces spray coating as an intermediary method between spin coating and sputtering. Spray coating uses a aerosol delivery system with carrier gas to deposit the semiconductor material uniformly across large areas, maintaining cost-effectiveness while achieving the uniformity required for high-performance transistors.
Solution Approach 2:
The patent optimizes spray coating parameters including substrate temperature (320-390°C), spray distance, and process solution composition to achieve uniform nanocrystalline dot formation across large-area substrates, resolving the uniformity issue that limits spin coating.
3Ease of manufacture
If manufacturing process is simplified to reduce cost, then ease of manufacture is improved, but device complexity increases due to process complications
Solution Approach 1:
The patent combines multiple functions into the spray coating process: depositing the oxide semiconductor layer, forming nanocrystalline dots, and achieving uniform coverage all in one step. This merging simplifies the overall manufacturing process while maintaining high performance, avoiding the need for separate processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach enables the production of high-performance thin film transistors with reduced manufacturing costs, improved channel efficiency, and enhanced durability against mechanical stress, while maintaining excellent electrical characteristics such as field-effect mobility and on-off current ratios.
Implementation Method 1
spray coating a process solution including a metal precursor and a volatile solvent on the substrate, and a temperature of the substrate may be about 320° C. to about 390° C.
Implementation Method 2
evaporating the volatility solvent of the process solution
Implementation Method 3
At least portion of the semiconductor layer may be treated with nitrous oxide (N2O) plasma
Data Source
AI summary
A thin film transistor according to an embodiment may include a gate electrode disposed on a substrate; a semiconductor layer overlapping the gate electrode via a gate insulating layer interposed therebetween; and a source electrode and a drain electrode in contact with the semiconductor layer, the semiconductor layer may include an amorphous oxide semiconductor, and the semiconductor layer may include nanocrystalline dots.