Oxide Semiconductor Transistor Structure for Stable Threshold Voltage

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Solution Overview

Problem

Existing thin film transistors using oxide semiconductors face challenges in maintaining stable electric characteristics due to variations in composition and manufacturing conditions, leading to fluctuating defect levels and electric characteristics.

Innovation Solution

A transistor structure is developed with an oxide semiconductor layer comprising a first region with a higher carrier concentration and a second region with a lower carrier concentration, separated by an energy barrier to prevent carrier trapping and stabilize the threshold voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If an oxide semiconductor film is used as the channel layer, then field effect mobility is improved and crystallization steps are eliminated, but the composition varies with manufacturing conditions causing electric characteristics to fluctuate

Engineering Contradiction:
Improvefield effect mobilityVSAvoidelectric characteristics stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The oxide semiconductor layer is divided into three distinct regions: a first region with high carrier concentration, a second region with low carrier concentration serving as the channel, and a third region with intermediate carrier concentration. This segmentation isolates the channel region from the influence of manufacturing condition variations, maintaining stable electric characteristics while preserving high mobility in the source/drain regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the oxide semiconductor layer are assigned different carrier concentrations tailored to their specific functions: the first region has high carrier concentration for efficient charge injection, the second region has low carrier concentration for stable threshold voltage, and the third region has intermediate concentration for transition. This local optimization resolves the contradiction between mobility and stability.

Inventive Principle:
Principle #3Local quality

2Power

If the carrier concentration in the oxide semiconductor layer is increased to improve field effect mobility, then on-current increases, but off-current also increases reducing the on/off ratio

Engineering Contradiction:
Improveon-currentVSAvoidoff-current
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The oxide semiconductor layer is segmented into regions with different carrier concentrations: the first region (source/drain) has high carrier concentration for high on-current, while the second region (channel) has low carrier concentration for low off-current. This spatial segmentation allows simultaneous optimization of both on-current and off-current characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The carrier concentration is locally optimized in each region: high in the source/drain regions for power delivery, low in the channel region for energy conservation. This local quality differentiation enables the transistor to achieve high on/off current ratio while maintaining excellent field effect mobility.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3629383B1Transistor, method of manufacturing transistor, and display device using the same
Publication Date: 2025.02.19 MIKUNI ELECTORON CO LTD
  • EP3629383B1 patent drawingFigure 1
  • EP3629383B1 patent drawingFigure 2A~2B
  • EP3629383B1 patent drawingFigure 3

AI summary

A transistor in an embodiment includes an oxide semiconductor layer (112) on a substrate (102), the oxide semiconductor layer (112) including a first region (112-1) and a second region (112-2), a first gate electrode (116) including a region overlapping the oxide semiconductor layer (112), the first gate electrode (116) being arranged on a surface of the oxide semiconductor layer (112) opposite to the substrate (102), a first insulating layer (114) between the first gate electrode (116) and the oxide semiconductor layer (112), and a first oxide conductive layer (108a) and a second oxide conductive layer (108b) between the oxide semiconductor layer (112) and the substrate (102), the first oxide conductive layer (108a) and the second oxide conductive layer (108b) each including a region in contact with the oxide semiconductor layer (112).