High-Voltage Oxide Transistor Channel Segmentation
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Solution Overview
Problem
High-voltage oxide transistors using oxide channels face reduced carrier mobility compared to transistors with non-oxide channels, such as Si, SiC, or GaN, which limits their performance.
Innovation Solution
The design incorporates a channel layer made of sequentially stacked oxide layers without silicon, with specific configurations of gate electrodes and insulating layers to enhance mobility, including varying mobilities and carrier densities across the oxide layers and distinct gate electrode structures to maintain high voltage characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If oxide layers are used as channel layer, then low-temperature processing is enabled, but carrier mobility is reduced by 1 to 2 orders compared to non-oxide channels
Solution Approach 1:
The channel layer is divided into multiple oxide layers with different band gaps, carrier densities, and mobilities. This segmentation allows each layer to contribute differently to the overall transistor performance, enabling low-temperature processing while maintaining acceptable carrier mobility through the combined effect of multiple layers.
Solution Approach 2:
Different oxide layers are assigned different local properties including varying carrier densities and mobilities. The layer adjacent to the gate electrode has lower carrier density and mobility, while other layers have higher values, creating optimal local conditions for both low-temperature processing and charge carrier transport.
2Reliability
If high voltage characteristics are achieved, then breakdown voltage is increased, but device complexity increases due to multiple gate electrodes and layer configurations
Solution Approach 1:
The gate electrode structure is segmented into multiple gates positioned at different locations relative to the channel layer. This segmentation enables independent control of different regions, allowing high breakdown voltage to be achieved by optimizing the electric field distribution across the channel without requiring overly complex structures.
Solution Approach 2:
The solution moves from a single-plane gate configuration to a multi-dimensional arrangement where gates are positioned both above and below the channel layer. This dimensional change allows for more flexible electric field control and higher breakdown voltage while keeping the overall device structure relatively simple.
3Reliability
If multiple oxide layers with different mobilities are stacked, then carrier mobility is increased, but manufacturing precision requirements increase
Solution Approach 1:
The invention changes key parameters of the oxide layers including band gap, carrier density, and mobility to optimize transistor performance. By carefully selecting and controlling these parameters across different layers, high carrier mobility is achieved while the manufacturing process remains feasible through standard low-temperature techniques.
Data Source
AI summary
A high-voltage oxide transistor includes a substrate; a channel layer disposed on the substrate; a gate electrode disposed on the substrate to correspond to the channel layer; a source contacting a first side of the channel layer; and a drain contacting a second side of the channel layer, wherein the channel layer includes a plurality of oxide layers, and none of the plurality of oxide layers include silicon. The gate electrode may be disposed on or under the channel layer. Otherwise, the gate electrodes may be disposed respectively on and under the channel layer.