Oxide Semiconductor Transistor Layering to Suppress Charge Trapping

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Solution Overview

Problem

Transistors using oxide semiconductors face reliability issues due to fluctuations in electric characteristics, particularly the threshold voltage, which is affected by charge trapping at the interface between the oxide semiconductor layer and the interfacial stability layer.

Innovation Solution

A layered structure is introduced, where an oxide semiconductor film is not directly in contact with an insulating film, but rather is separated by a metal oxide film containing a constituent similar to the oxide semiconductor. This structure includes a first metal oxide film in contact with the insulating film, an oxide semiconductor film in contact with the metal oxide film, and a second metal oxide film in contact with the oxide semiconductor film, with a gate insulating film on top.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an interfacial stability layer is provided to suppress threshold voltage shift, then reliability is improved, but charge trapping occurs at the interface between the active layer and interfacial stability layer

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidcharge trapping
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A metal oxide film is introduced as an intermediary layer between the oxide semiconductor active layer and the insulating interfacial stability layer. This metal oxide film contains constituents similar to the oxide semiconductor film, creating a gradual transition that reduces interface discontinuity and suppresses charge trapping while maintaining the reliability benefits of the interfacial stability layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the interfacial stability layer has properties similar to gate insulating layer and protective layer, then manufacturing is simplified, but the interface state with active layer cannot be kept favorable

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidinterface state stability
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The interface region is segmented into multiple functional layers: the insulating interfacial stability layer maintains manufacturing simplicity with its established properties, while the newly introduced metal oxide film segment specifically addresses interface state stability by providing a transitional composition between the active layer and the insulating layer.

Inventive Principle:
Principle #1Segmentation

3Reliability

If a layered structure with metal oxide film is introduced to suppress charge trapping, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesemiconductor device reliabilityVSAvoidlayered structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal oxide film is strategically positioned only at the critical interface region where charge trapping occurs, providing localized improvement in reliability. The bulk regions of the device maintain their original simple structures, thus minimizing the overall complexity increase while achieving the reliability enhancement.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12249653B2Semiconductor device
Publication Date: 2025.03.11 SEMICON ENERGY LAB CO LTD
  • US12249653B2 patent drawing
  • US12249653B2 patent drawing
  • US12249653B2 patent drawing

AI summary

An object is to stabilize electric characteristics of a semiconductor device including an oxide semiconductor to increase reliability. The semiconductor device includes an insulating film; a first metal oxide film on and in contact with the insulating film; an oxide semiconductor film partly in contact with the first metal oxide film; source and drain electrodes electrically connected to the oxide semiconductor film; a second metal oxide film partly in contact with the oxide semiconductor film; a gate insulating film on and in contact with the second metal oxide film; and a gate electrode over the gate insulating film.