Oxide Semiconductor Transistor Insulating Layer Layout for Current Symmetry
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Solution Overview
Problem
Oxide semiconductor transistors used in DRAM memory cells experience characteristic changes and asymmetry in on-state current due to heat treatment, leading to instability and asymmetry in current flow.
Innovation Solution
The semiconductor device incorporates an oxide semiconductor transistor with a gate electrode surrounding the channel, featuring a lower oxygen atom concentration in the upper insulating layer compared to the lower insulating layer, which suppresses the supply of oxygen to the upper region, maintaining stable carrier concentration and reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If heat treatment is performed after transistor structure formation, then manufacturing process is completed, but characteristic change and asymmetry in on-state current occurs
Solution Approach 1:
The patent applies preliminary action by forming the lower insulating layer with lower oxygen concentration before the heat treatment process. This pre-configured low-oxygen environment protects the oxide semiconductor layer during subsequent heat treatment, preventing oxygen diffusion that would cause characteristic changes and current asymmetry. The lower insulating layer serves as a preventive barrier established in advance to maintain transistor characteristics throughout the manufacturing process.
Solution Approach 2:
The lower insulating layer acts as an intermediary between the oxide semiconductor layer and the high-oxygen environment. By positioning this layer with lower oxygen concentration adjacent to the oxide semiconductor, it mediates the oxygen exchange process during heat treatment, blocking excessive oxygen diffusion while still allowing necessary thermal processing to complete the manufacturing sequence.
2Quantity of substance
If oxygen concentration in upper insulating layer is high, then oxygen supply to oxide semiconductor layer is sufficient, but contact resistance increases and characteristic stability decreases
Solution Approach 1:
The patent applies local quality by creating a spatial gradient in oxygen concentration within the insulating layers. The lower insulating layer is specifically engineered with lower oxygen concentration in the region adjacent to the oxide semiconductor layer, while other regions may have different oxygen concentrations. This localized oxygen concentration control optimizes the interface properties, reducing contact resistance and preventing characteristic instability without compromising overall device functionality.
3Productivity
If heat treatment is performed, then manufacturing process is advanced, but asymmetry in on-state current develops
Solution Approach 1:
The patent implements preliminary action by pre-forming the lower insulating layer with controlled lower oxygen concentration before heat treatment. This preparatory structure prevents asymmetric oxygen diffusion during thermal processing, thereby maintaining symmetric on-state current characteristics throughout the manufacturing advancement. The asymmetric oxygen concentration distribution in insulating layers is deliberately designed to counterbalance potential asymmetric effects during heat treatment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration stabilizes the oxide semiconductor transistor characteristics by suppressing asymmetry in on-state current after heat treatment, ensuring consistent performance and reducing parasitic resistance.
Implementation Method 1
a second insulating layer provided between the gate electrode and the second electrode and having an oxygen atom concentration lower than an oxygen atom concentration of the first insulating layer
Data Source
AI summary
A semiconductor device according to the embodiment includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode opposed to the oxide semiconductor layer; a gate insulating layer provided between the oxide semiconductor layer and the gate electrode; a first insulating layer provided between the gate electrode and the first electrode; and a second insulating layer provided between the gate electrode and the second electrode and having an oxygen atom concentration lower than an oxygen atom concentration of the first insulating layer.